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HDSP2110S Datasheet(PDF) 6 Page - Infineon Technologies AG |
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HDSP2110S Datasheet(HTML) 6 Page - Infineon Technologies AG |
6 / 13 page ![]() 2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA HDSP2110S/1S/2S/3S/4S/5S www.infineon.com/opto • 1-888-Infineon (1-888-463-4636) OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany www.osram-os.com • +49-941-202-7178 6 March 24, 2000-13 Figure 5. Top View Pin Assignment Pin Function Definition 1 RST Used to initialize a display and sychronize blinking for multiple displays 2FL Low input accesses the Flash RAM 3 A0 Address input LSB 4 A1 Address input 5 A2 Address input MSB 6 A3 Mode selector 7 VCC Optional connection to positive power supply input. 8 VCC 9 VCC 10 A4 Mode Selector 11 CLKSEL Selects internal/high clock source 28 Pins 15 1 Pins 14 Digit 0 1 2 3 4 5 6 7 Figure 6. Character Set ASCII CODE D0 D1 D2 D3 L L L L 0 H L L L 1 L H L L 2 H H L L 3 L L H L 4 H L H L 5 L H H L 6 H H H L 7 L L L H 8 H L L H 9 L H L H A H H L H B L L H H C H L H H D L H H H E H H H H F L L L L H H H H X L L L L L L L L H L L H H L L H H X L H L H L H L H X 0 1 2 3 4 5 6 7 8 D6 D7 D5 D4 HEX UDC 0 UDC 1 UDC 2 UDC 3 UDC 4 UDC 5 UDC 6 UDC 7 UDC 8 UDC 9 UDC 10 UDC 11 UDC 12 UDC 13 UDC 14 UDC 15 Notes: 1. Upon power up, the device will initialize in a random state. 2. X=don’t care. Pin Assignment (continued) Pin Function Definition 12 CLK I/O Outputs master clock or inputs external clock 13 WR A low will write data into the display if CE is low 14 VCC Positive power supply input 15 GND supply Analog Ground for LED drivers 16 GND logic Digital Ground for internal drivers 17 CE Enables access to the display 18 RD A low will read data from the display if CE is low. If read from display is not required, then RD can be tied to VCC 19 D0 Data input LSB 20 D1 Data input 21 No pin — 22 No pin — 23 D2 Data input 24 D3 Data input 25 D4 Data input 26 D5 Data input 27 D6 Data input 28 D7 Data input MSB, selects ROM, page 1 or 2 |
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