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CS4237B Datasheet(PDF) 39 Page - Cirrus Logic |
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CS4237B Datasheet(HTML) 39 Page - Cirrus Logic |
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39 / 114 page  0 - Mono 1 - Stereo C/L, FMT1, and FMT0 bits set the audio data format as shown below. In MODE 1, FMT1, which is forced low, FMT0, and C/L are used for both playback and cap- ture. In MODEs 2 and 3, these bits are only used for playback, and the capture format is independently se- lected via register I28. MCE (R0) or PMCE (I16) must be set to modify the upper four bits of this register. See Changing Audio Data Formats section for more details. FMT1 † D7 FMT0 D6 C/L D5 Audio Data Format 00 0 Linear, 8-bit unsigned 00 1 µ-Law, 8-bit companded 01 0 Linear, 16-bit two’s complement, Little Endian 01 1 A-Law, 8-bit companded 10 0 RESERVED 10 1 ADPCM, 4-bit, IMA compatible 11 0 Linear, 16-bit two’s complement, Big Endian 11 1 RESERVED † FMT1 is not available in MODE 1 (forced to 0). Interface Configuration (I9) Default = 00x01000 D7 D6 D5 D4 D3 D2 D1 D0 CPIO PPIO res CAL1 CAL0 SDC CEN PEN PEN Playback Enable. This bit enables playback. The WSS Codec will generate a DRQ and respond to DACK signal when this bit is en- abled and PPIO=0. If PPIO=1, PEN enables PIO playback mode. PEN may be set and reset without setting the MCE bit. 0 - Playback Disabled (playback DRQ and PIO inactive) 1 - Playback Enabled CEN Capture Enabled. This bit enables the capture of data. The WSS Codec will generate a DRQ and respond to DACK signal when CEN is enabled and CPIO=0. If CPIO=1, CEN en- ables PIO capture mode. CEN may be set and reset without setting the MCE bit. 0 - Capture Disabled (capture DRQ and PIO inactive) 1 - Capture Enabled SDC Single DMA Channel: This bit will force BOTH capture and playback DMA re- quests to occur on the Playback DMA channel. This bit forces the WSS Codec to use one DMA chan- nel. Should both capture and playback be enabled in this mode, only the playback will occur. See the DMA Interface section for further ex- planation. 0 - Dual DMA channel mode 1 - Single DMA channel mode CAL1,0 Calibration: These bits determine which type of calibration the WSS Codec performs whenever the Mode Change Enable (MCE) bit, R0, changes from 1 to 0. The number of sample periods required for calibra- tion is listed in parenthesis. 0 - No calibration (0) 1 - Converter calibration (321) 2 - DAC calibration (120) 3 - Full calibration (450) PPIO Playback PIO Enable: This bit deter- mines whether the playback data is transferred via DMA or PIO. 0 - DMA transfers 1 - PIO transfers CPIO Capture PIO Enable: This bit deter- mines whether the capture data is transferred via DMA or PIO. 0 - DMA transfers 1 - PIO transfers DS213PP4 CS4237B 39 |
Similar Part No. - CS4237B |
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Similar Description - CS4237B |
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