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CS4237B Datasheet(PDF) 25 Page - Cirrus Logic

Part # CS4237B
Description  CrystalClear Advanced Audio System with 3D Sound
Download  114 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4237B Datasheet(HTML) 25 Page - Cirrus Logic

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The E
2PROM interface uses an industry standard
2-wire interface consisting of a bi-directional
data line and a clock line driven from the part.
After power-on the part looks for the existence
of an E
2PROM device and loads the user de-
fined data. The existence is determined by the
first two bytes read (0x55 followed by 0xBB). If
the first two bytes are correct, the part reads the
next two bytes to determine the length of data in
the E
2PROM. The length bytes indicate the
number of bytes left to be read (not including
the two validation bytes or two length bytes). As
shown in Figure 3, the E
2PROM is read using a
start bit followed by a dummy write, to initialize
the address to zero. Then another start bit and
device address, followed by all the data. Since
the part uses the sequential read properties of the
E
2PROM, only one E2PROM, is supported
(ganged E
2PROMs are not supported).
Some E
2PROMs that are compatible with this
interface are:
Atmel
AT24Cxx series
MicroChip
24LCxxB series
National
NM24CxxL series
Ramtron
FM24Cxx series
SGS Thompson
ST24Cxx series
Xicor
X24Cxx series
where the xx is replaced by 02, 04, 08, or 16
based on the size of the E
2PROM desired. The
size of 16 (2k bytes) is preferred since it allows
the maximum flexibility for upgrading firmware
patches. Other E
2PROMs compatible with Fig-
ure 3 and the timing parameters listed in the
front of the data sheet may also be used.
The maximum Hardware Configuration and PnP
resource RAM data supported is 384 bytes, and
a four byte header; therefore, the maximum
amount of data storage, without firmware
patches, in E
2PROM would be 388 bytes. The
maximum size E
2PROM supported is 2k bytes.
This allows the inclusion of firmware patches af-
ter the PnP resource data.
If an external E
2PROM exists, it is accessed by
the serial interface and is connected to the XD0
and XA0 pins. The two-wire interface is control-
led by three bits in the Control logical device,
Hardware Control Register (CTRLbase+1). The
serial data can be written to or read from the
E
2PROM by sequentially writing or reading that
register. The three register bits, D0, D1, D2 are
labeled CLK, DOUT, and DIN/EEN respectively.
The DIN/EEN bit, when written to a one, en-
ables the E
2PROM serial interface. When the
DIN/EEN bit is written to a zero, the serial inter-
face is disabled. The DIN/EEN bit is also the
Data In (DIN) signal to read back data from the
E
2PROM. The XD0 pin is a bi-directional open-
drain data line supporting DIN and DOUT;
therefore, to read the correct data, the DOUT bit
must be set to a one prior to performing a read
of the register. Otherwise, the data read back
from DIN/EEN will be all zeros. The E
2PROM
data can then be read from the DIN/EEN bit.
The CLK bit timing is controlled by the host
software. This is the serial clock for the
E
2PROM. The DOUT bit is used to write/pro-
gram the data out to the E
2PROM. An external
pull-up resistor is required on XD0 because it is
an open-drain output. Use the guidelines in the
S 1 0 1 00 00 0 A 0000000 0 A S 1 0100001 A
Data
Data
P
1
A
Start
Part
Address
Start
Acknowledge
No
Acknowledge
Stop
Acknowledge
Data
EEPROM
Write
Read
Bank
Address
Part
Address
Crystal IC
Figure 3. EEPROM Format
DS213PP4
CS4237B
25


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