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CS4237B Datasheet(PDF) 88 Page - Cirrus Logic |
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CS4237B Datasheet(HTML) 88 Page - Cirrus Logic |
88 / 114 page In the first format, where VCF1,0 = 00, the mute function is a toggle or push-on/push-off style. When the MUTE pin is low, the master out vol- ume is muted. Pressing the up or down buttons have no effect while the mute switch is on. In the second format, where VCF1,0 = 01, the mute function is a momentary switch (similar to up and down). When MUTE goes low the mas- ter out volume mutes if it was un-muted and vise-versa (the mute button alternates between mute and un-mute). If the master volume is muted and up or down is pressed, the volume automatically un-mutes. In the third format, where VCF1,0 = 10, the MUTE pin is not used. This is a two-button for- mat where pressing up and down simultaneously mutes the master volume. If the master volume is muted and up or down is individually pressed, the volume automatically un-mutes. The three formats listed above as illustrated in Figure 25. A fo ur th fo rmat for mute e xists, wh ere VCF1,0 = 11, which is backwards compatible with the CS4236. This mode is similar to the two button mode, except the MUTE pin is used as the up function and the UP pin is not used. Crystal / Clock Two pins have been allocated to allow the inter- facing of a crystal oscillator: XTALI and XTALO. The crystal should be designed as fun- damental mode, parallel resonant, with a load capacitor of between 10 and 20 pF. The capaci- tors connected to each of the crystal pins should be twice the load capacitance specified to the crystal manufacturer. An external CMOS clock may be connected to the crystal input XTALI in lieu of the crystal. When using an external CMOS clock, the XTALO pin must be left floating with no trace or external connection of any kind. General Purpose Output Pins Two general purpose outputs are provided to en- able control of external circuitry (i.e. mute function). XCTL1 and XCTL0 in the WSS Codec register I10 are output directly to the ap- propriate pin when enabled. Pin XCTL0/XA2 becomes an output for XCTL0 whenever the resource data for the CDROM or Synthesizer specifies a logical device address 100 pF VDF 10 k Ω 10 k Ω 10 k Ω UP DOWN MUTE Up GND Mute Down 100 Ω 100 pF 100 pF 100 Ω 100 Ω Figure 24. Volume Control Circuit Up GND Mute Down VCF1,0 = 00 Up GND Mute Down VCF1,0 = 01 Up GND Mute Down VCF1,0 = 10 Figure 25. Volume Control Formats DS213PP4 CS4237B 88 |
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