 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
CS4237B Datasheet(PDF) 8 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS4237B Datasheet(HTML) 8 Page - Cirrus Logic |
|
|
8 / 114 page  TIMING PARAMETERS (Continued) Parameter Symbol Min Max Units Parallel Bus Timing IOW or IOR strobe width tSTW 90 - ns Data valid to IOW rising edge (write cycle) tWDSU 22 - ns IOR falling edge to data valid (read cycle) tRDDV -60 ns SA <> and AEN setup to IOR or IOW falling edge tADSU 22 - ns SA <> and AEN hold from IOW or IOR rising edge tADHD 10 - ns DACK<> inactive to IOW or IOR falling edge (DMA cycle immediately followed by a non-DMA cycle) (Note 8) tSUDK1 60 - ns DACK<> active from IOW or IOR rising edge (non-DMA cycle completion followed by DMA cycle) (Note 8) tSUDK2 0- ns DACK<> setup to IOR falling edge (DMA cycles) DACK<> setup to IOW falling edge (Note 8) tDKSUa tDKSUb 25 25 - - ns ns Data hold from IOW rising edge tDHD2 15 - ns DRQ<> hold from IOW or IOR falling edge DTM(I10) = 0 (assumes no more DMA cycles needed) DTM(I10) = 1 tDRHD - -25 45 - ns Time between rising edge of IOW or IOR to next falling edge of IOW or IOR tBWDN 80 - ns Data hold from IOR rising edge tDHD1 025 ns DACK<> hold from IOW rising edge DACK<> hold from IOR rising edge tDKHDa tDKHDb 25 25 - - ns ns RESDRV pulse width high (Note 1) tRESDRV 1- ms Initialization Time (Note 1, 9) tINIT 130 1200 ms EEPROM Read Time (Note 1, 10) tEEPROM 1420 ms XTAL, 16.9344 MHz, frequency (Notes 1, 11) 16.92 16.95 MHz XTALI high time (Notes 1, 11) 24 - ns XTALI low time (Notes 1, 11) 24 - ns Sample Frequency (Note 1) Fs 3.918 50 kHz Serial Port Timing SCLK rising to SDOUT valid (Note 1) tPD1 -60 ns SCLK rising to FSYNC transition (Note 1) tPD2 -20 20 ns SDIN valid to SCLK falling (Note 1) tS1 30 - ns SDIN hold after SCLK falling (Note 1) tH1 30 - ns Notes: 8. AEN must be high during DMA cycles. 9. Initialization time depends on the power supply circuitry, as well as the the type of clock used. 10. EEPROM read time is dependent on amount of data in EEPROM. Minimum time relates to no EEPROM present. Maximum time relates to EEPROM data size of 2k bytes. 11. The Sample frequency specification must not be exceeded. DS213PP4 CS4237B 8 |
Similar Part No. - CS4237B |
|
Similar Description - CS4237B |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
