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CS4237B Datasheet(PDF) 64 Page - Cirrus Logic |
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CS4237B Datasheet(HTML) 64 Page - Cirrus Logic |
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64 / 114 page  Control/RAM Access CTRLbase+5, Default = xxxxxxxx D7 D6 D5 D4 D3 D2 D1 D0 CR7 CR6 CR5 CR4 CR3 CR2 CR1 CR0 CR7-CR0 This register controls the loading of the part’s internal RAM. RAM sup- port includes hardware configuration and PnP default resource data, as well as program memory. See the Hostload Procedure section for more information. Commands are followed by address and data information. Commands: 0x55 - Disable PnP Key 0x56 - Disable Crystal Key 0x57 - Jump to ROM 0x5A - Update Hardware Configura- tion Data. 0xAA - Download RAM. Address followed by data. (Stopped by writ- ing 0 to CTRLbase+6) RAM Access End CTRLbase+6, Default = xxxxxxxx D7 D6 D5 D4 D3 D2 D1 D0 RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0 RE7-RE0 A 0 written to this location resets the previous location, CTRLbase+5, from data download mode to com- mand mode. Global Status CTRLbase+7, Default = xxxxxxxx D7 D6 D5 D4 D3 D2 D1 D0 CWSS ICTRL ISB IWSS IMPU res res res res Reserved. Could read as 0 or 1. IMPU MPU-401 Interrupt status. 0 - no interrupt pending 1 - an interrupt is pending IWSS Windows Sound System Interrupt status. 0 - no interrupt pending 1 - an interrupt is pending ISB Sound Blaster Interrupt status. 0 - no interrupt pending 1 - an interrupt is pending ICTRL Control Logical Device 2 Interrupt status. Interrupts are generated on a context switch between WSS and SBPro modes. 0 - no interrupt pending 1 - an interrupt is pending CWSS Context - WSS. Indicates the current context. 0 - Sound Blaster Emulation 1 - Windows Sound System DS213PP4 CS4237B 64 |
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