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CS4237B Datasheet(PDF) 61 Page - Cirrus Logic |
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CS4237B Datasheet(HTML) 61 Page - Cirrus Logic |
61 / 114 page CONTROL INTERFACE The Control logical device includes registers for controlling various functions of the part that are not included in the other logical device blocks. These functions include game port rate control and programmable power management, as well as extra mixing functions. Control Register Interface The Control logical device software interface oc- cupies 8 I/O locations, utilizes 12-bit address de cod ing , and is l oca ted at PnP address ’CTRLbase’. If the upper address bits, SA12- SA15 are used, they must be 0 to decode a valid address. This device can also support an inter- rupt. Table 21 lists the eight Control registers. Joystick and Power Control CTRLbase + 0, Default = 00000000 D7 D6 D5 D4 D3 D2 D1 D0 PM1 PM0 CONSW PDC PDP PDM JR1 JR0 JR1,0 Joystick rate control. Selects operating speed of the joystick (changes the trigger threshold for the X/Y coordi- nates). 00 - slowest speed 01 - medium slow speed 10 - medium fast speed 11 - fastest speed PDM Power Down Mixer. When set, the analog mixer is powered down and all mixer control registers (in WSSbase space) are reset to de- fault values. PDP* Power Down Processor. When set, places the internal processor in an idle state. This effects the PnP inter- face, MPU-401, and SBPro devices. PDC* Power Down Codec. When set, ADCs and DACs are powered down. CONSW controls host interrupt generation when a context switch occurs 0 - no interrupt on context switch 1 - Control interrupt generated on context switch PM1,0 Power Management. These bits are provided for backwards compatibility. For new designs, the bits in CTRLbase+2 should be used. 00 - All functions active. 01 - A/D and D/A powered down. Mixer still active, but volume reg- isters are frozen. Disables PDC and PDM bits. 10 - Full part power down. All functions are disabled except reads and writes to this register. All internal logic, including PnP config. registers are reset. To exit this power-down mode, PM1/0 must be reset, through CTRLbase+ 0, and then the entire chip must be reinitialized. 11* - WSS Codec, SBPro, MPU-401, and PnP interfaces, and the analog mixer are powered down. * NOTE: The SBPro, PnP, and MPU-401 interfaces are linked together. Setting PM1,0 or PDP will power all three interfaces down; however, if any one of the interfaces is written to, they will all power back up automatically. PM1,0 and PDP always reflects the value written, not whether the three devices are pow- ered up or not. Address Register CTRLbase+0 Joystick & Power Control CTRLbase+1 E 2PROM Interface CTRLbase+2 Block Power Down CTRLbase+3 Control Indirect Address Reg. CTRLbase+4 Control Indirect Data Register CTRLbase+5 Control/RAM Access CTRLbase+6 RAM Access End CTRLbase+7 Global Status Table 21. Control Logical Device Registers DS213PP4 CS4237B 61 |
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Similar Description - CS4237B |
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