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CS4237B Datasheet(PDF) 56 Page - Cirrus Logic |
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CS4237B Datasheet(HTML) 56 Page - Cirrus Logic |
56 / 114 page Left Wavetable Serial Port Volume (X16) Default = 00000000 D7 D6 D5 D4 D3 D2 D1 D0 LWM res LWG5 LWG4 LWG3 LWG2 LWG1 LWG0 This Wavetable volume register can also be control- led through I18 when WTEN=1 (C8 or Global Config. byte) & WTRMD=0 (X4). LWG5-LWG0 Left Wavetable Serial Port Gain. Least significant bit represents 1.5 dB, with 01000 = 0 dB. See Table 6. res Reserved. Must write 0. Could read as 0 or 1. LWM Left Wavetable Serial Port Mute. When set, the Left Wavetable Serial Input to the digital mixer is muted. Right Wavetable Serial Port Volume (X17) Default = 00000000 D7 D6 D5 D4 D3 D2 D1 D0 RWM res RWG5 RWG4 RWG3 RWG2 RWG1 RWG0 This Wavetable volume register can also be control- led through I19 when WTEN=1 (C8 or Global Config. byte) & WTRMD=0 (X4). RWG5-RWG0 Right Wavetable Serial Port Gain. Least significant bit represents 1.5 dB, with 01000 = 0 dB. See Table 6. res Reserved. Must write 0. Could read as 0 or 1. RWM Right Wavetable Serial Port Mute. When set, the Right Wavetable Se- rial Input to the digital mixer is muted. Chip Version and ID (X25) Default = 11001000 D7 D6 D5 D4 D3 D2 D1 D0 V2 V1 V0 CID4 CID3 CID2 CID1 CID0 This register was added to Revision C silicon. In revi- sion B, this register read 0x00. CID5-CID0 Chip Identification. Distinguishes between this chip and other codec chips that support this register set. This register is identical to C1 and replaces the ID register in I25. 00000 - CS4237B, Revision B 01000 - CS4237B V2-V0 Version Number. As enhancements are made, the version number is changed so software can distinguish between the different versions of the same chip. 000 - Revision B 110 - Revision C/D 111 - Revision E DS213PP4 CS4237B 56 |
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