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NCP1271 Datasheet(PDF) 17 Page - ON Semiconductor |
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NCP1271 Datasheet(HTML) 17 Page - ON Semiconductor |
17 / 19 page NCP1271 http://onsemi.com 17 Figure 40. NCP1271 Operation Threshold Fault operation when staying in this region longer than 130 ms PWM operation Non−latched shutdown 3 V V FB 0 V V skip Figure 41. Non−Latchoff Shutdown 1 2 3 4 8 6 5 NCP1271 OFF opto coupler Output Drive The output stage of the device is designed to directly drive a power MOSFET. It is capable of up to +500 mA and −800 mA peak drive currents and has a typical rise and fall time of 30 ns and 20 ns with a 1.0 nF load. This allows the NCP1271 to drive a high−current power MOSFET directly for medium−high power application. Noise Decoupling Capacitors There are three pins in the NCP1271 that may need external decoupling capacitors. 1. Skip/Latch Pin (Pin 1) – If the voltage on this pin is above 8.0 V, then the circuit enters latchoff. Hence, a decoupling capacitor on this pin is essential for improved noise immunity. Additionally, a resistor should always be placed from this pin to GND to prevent noise from causing the pin 1 level to exceed the latchoff level. 2. Feedback Pin (Pin 2) – The FB pin is a high impedance point and is very easily polluted in a noisy environment. This could effect the circuit operation. 3. VCC Pin (Pin 6) – The circuit maintains normal operation when VCC is above VCC(off) (9.1 V typical). But, if VCC drops below VCC(off) because of switching noise, then the circuit can incorrectly recognize it as a fault condition. Hence, it is important to locate the VCC capacitor or an additional decoupling capacitor as close as possible to the device. |
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