NCP1271 datasheet(15/19 Pages) ONSEMI

Part #	NCP1271

Description	Soft?뭆kip Mode Standby PWM Controller with Adjustable Skip Level and External Latch

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Manufacturer	ONSEMI [ON Semiconductor]

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NCP1271

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15

Besides the timer−based fault detection, the NCP1271

also enters fault condition when VCC drops below VCC(off)

(9.1 V typical). The device will again enter a double hiccup

mode and try to restart the application.

Operation in Standby Condition

During standby operation, or when the output has a light

load, the duty cycle on the controller can become very

small. At this point, a significant portion of the power

dissipation is related to the power MOSFET switching on

and off. To reduce this power dissipation, the NCP1271

“skips” pulses when the FB level (i.e. duty cycle) drops too

low. The level that this occurs at is completely adjustable

by setting a resistor on pin 1.

By discontinuing pulses, the output voltage slowly drops

and the FB voltage rises. When the FB voltage rises above

the Vskip level, the drive is turned back on. However, to

minimize the risk of acoustic noise, when the drive turns

back on the duty cycle of its pulses are also ramped up. This

is similar to the soft start function, except the period of the

Soft−Skip operation is only 300

ms instead of 4.0 ms for the

soft start function. This feature produces a timing diagram

shown in Figure 36.

Figure 36. Soft−Skip Operation

V

FB

ID

skip

Soft Skip

Skip Duty Cycle

Skip peak current, %Icsskip, is the percentage of the

maximum peak current at which the controller enters skip

mode. Icsskip can be any value from 0 to 100% as defined

by equation 5. However, the higher that %Icsskip is, the

greater the drain current when skip is entered. This

increases the risk of acoustic noise. Conversely, the lower

that %Icsskip is the larger the percentage of energy is

expended turning the switch on and off. Therefore it is

important to adjust %Icsskip to the optimal level for a given

application.

%Icsskip +

Vskip

3V

· 100%

(eq. 5)

Skip Adjustment

By default, when the Skip/latch Pin (Pin 1) is opened, the

skip level is 1.2 V (Vskip = 1.2 V). This corresponds to a

40% Icsskip (%Icsskip = 1.2 V / 3.0 V

100% = 40%).

Therefore, the controller will enter skip mode when the

peak current is less than 40% of the maximum peak current.

However, this level can be externally adjusted by placing

a resistor Rskip between skip/latch pin (Pin 1) and Ground

(Pin 4). The level will change according to equation 6.

Vskip + Rskip

Iskip

(eq. 6)

To operate in skip cycle mode, Vskip must be between

0 V and 3.0 V. Therefore, Rskip must be within the levels

given in Table 1.

Table 1. Skip Resistor Rskip Range for Dmax = 80% and Iskip = 43 mA

%Icsskip

Vskip or Vpin1

Rskip

Comment

0%

0 V

0 W

Never skips.

12%

0.375 V

8.7 kW

−

25%

0.75 V

17.4 kW

−

40%

1.2 V

28 kW

−

50%

1.5 V

34.8 kW

−

100%

3.0 V

70 kW

Always skips.

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