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NCP1271 Datasheet(PDF) 5 Page - ON Semiconductor |
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NCP1271 Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 19 page NCP1271 http://onsemi.com 5 ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values, TJ = −40°C to +125°C, VCC = 14 V, HV = open, skip = open, FB = 2 V, CS = Ground, DRV = 1 nF, unless otherwise noted.) Characteristic Pin Symbol Min Typ Max Unit OSCILLATOR Oscillation Frequency (65 kHz Version, TJ = 25_C) Oscillation Frequency (65 kHz Version, TJ = −40 to + 85_C) Oscillation Frequency (65 kHz Version, TJ = −40 to + 125_C) Oscillation Frequency (100 kHz Version, TJ = 25_C) Oscillation Frequency (100 kHz Version, TJ = −40 to +85_C) Oscillation Frequency (100 kHz Version, TJ = −40 to +125_C) 5 fosc 61.75 58 55 95 89 85 65 65 65 100 100 100 68.25 69 69 105 107 107 kHz Oscillator Modulation Swing, in Percentage of fosc 5 − − "7.5 − % Oscillator Modulation Swing Period 5 − − 6.0 − ms Maximum Duty Cycle (VCS = 0 V, VFB = 2.0 V) 5 Dmax 75 80 85 % GATE DRIVE Gate Drive Resistance Output High (VCC = 14 V, Drv = 300 W to Gnd) Output Low (VCC = 14 V, Drv = 1.0 V) 5 ROH ROL 6.0 2.0 11 6.0 20 12 W Rise Time from 10% to 90% (Drv = 1.0 nF to Gnd) 5 tr − 30 − ns Fall Time from 90% to 10% (Drv = 1.0 nF to Gnd) 5 tf − 20 − ns CURRENT SENSE Maximum Current Threshold 3 ILimit 0.95 1.0 1.05 V Soft−Start Duration − tSS − 4.0 − ms Soft−Skip Duration − tSK − 300 − ms Leading Edge Blanking Duration 3 tLEB 100 180 330 ns Propagation Delay (Drv =1.0 nF to Gnd) − − − 50 150 ns Ramp Current Source Peak 3 Iramp(H) − 100 − mA Ramp Current Source Valley 3 Iramp(L) − 0 − mA SKIP Default Standby Skip Threshold (Pin 1 = Open) 2 Vskip − 1.2 − V Skip Current (Pin 1 = 0 V, TJ = 25_C) 1 Iskip 26 43 56 mA Skip Level Reset (Note 5) 1 Vskip−reset 5.0 5.7 6.5 V Transient Load Detection Level to Disable Soft−Skip Mode 2 VTLD 2.6 2.85 3.15 V EXTERNAL LATCH Latch Protection Threshold 1 Vlatch 7.1 8.0 8.7 V Latch Threshold Margin (Vlatch−m = VCC(off) − Vlatch) 1 Vlatch−m 0.6 1.2 − V Noise Filtering Duration 1 − − 13 − ms Propagation Delay (Drv = 1.0 nF to Gnd) 1 Tlatch − 100 − ns SHORT−CIRCUIT FAULT PROTECTION Time for Validating Short−Circuit Fault Condition 2 tprotect − 130 − ms 5. Please refer to Figure 39 for detailed description. 6. Guaranteed by design. |
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