AD7674

Pin No.

Mnemonic

Description

34

PD

DI

Power-Down Input. When set to a logic HIGH, power consumption is reduced and conversions are

inhibited after the current one is completed.

35

CNVST

DI

Start Conversion. A falling edge on CNVST puts the internal sample/hold into the hold state and initiates

a conversion. In Impulse mode (IMPULSE HIGH, WARP LOW), if CNVST is held LOW when the acquisition

36

AGND

P

Must Be Tied to Analog Ground.

37

REF

AI

Reference Input Voltage and Internal Reference Buffer Output. Apply an external reference on REF if the

internal reference buffer is not used. Should be decoupled effectively with or without the internal buffer.

38

REFGND

AI

Reference Input Analog Ground.

39

IN–

AI

Differential Negative Analog Input.

40–42,

45

NC

No Connect.

43

IN+

AI

Differential Positive Analog Input.

46

REFBUFIN

AI

Reference Buffer Input Voltage. The internal reference buffer has a fixed gain. It outputs 4.096 V typically

when 2.5 V is applied on this pin.

48

PDBUF

DI

Allows Choice of Buffering Reference. When LOW, buffer is selected. When HIGH, buffer is switched off.

Table 7. Data Bus Interface Definitions

MODE

MODE1

MODE0

D0/OB/2C

D1/A0

D2/A1

D[3]

D[4:9]

D[10:11]

D[12:15]

D[16:17]

Description

0

0

0

R[0]

R[1]

R[2]

R[3]

R[4:9]

R[10:11]

R[12:15]

R[16:17]

18-Bit Parallel

1

0

1

OB/2C

A0:0

R[2]

R[3]

R[4:9]

R[10:11]

R[12:15]

R[16:17]

16-Bit High Word

1

0

1

OB/2C

A0:1

R[0]

R[1]

All Zeros

16-Bit Low Word

2

1

0

OB/2C

A0:0

A1:0

All Hi-Z

R[10:11]

R[12:15]

R[16:17]

8-Bit HIGH Byte

2

1

0

OB/2C

A0:0

A1:1

All Hi-Z

R[2:3]

R[4:7]

R[8:9]

8-Bit MID Byte

2

1

0

OB/2C

A0:1

A1:0

All Hi-Z

R[0:1]

All Zeros

8-Bit LOW Byte

2

1

0

OB/2C

A0:1

A1:1

All Hi-Z

All Zeros

R[0:1]

8-Bit LOW Byte

3

1

1

OB/2C

All Hi-Z

Serial Interface

Serial Interface

R[0:17] is the 18-bit ADC value stored in its output register.

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