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HEF4518B Datasheet(PDF) 3 Page - Nexperia B.V. All rights reserved |
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HEF4518B Datasheet(HTML) 3 Page - Nexperia B.V. All rights reserved |
3 / 13 page Nexperia HEF4518B Dual BCD counter 6. Pinning information 6.1. Pinning HEF4518B 1CP0 VDD 1CP1 2MR 1Q0 2Q3 1Q1 2Q2 1Q2 2Q1 1Q3 2Q0 1MR 2CP1 VSS 2CP0 001aae699 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 Fig. 3. Pin configuration for SOT109-1 (SO16) 6.2. Pin description Table 2. Pin description Symbol Pin Description 1CP0, 2CP0 1, 9 clock input (LOW-to-HIGH triggered) 1CP1, 2CP1 2, 10 clock input (HIGH-to-LOW triggered) 1Q0, 2Q0 3, 11 output 1Q1, 2Q1 4, 12 output 1Q2, 2Q2 5, 13 output 1Q3, 2Q3 6, 14 output 1MR, 2MR 7, 15 master reset input VDD 16 supply voltage VSS 8 ground supply voltage 7. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = positive-going transition; ↓ = negative-going transition. nCP0 nCP1 nMR Mode ↑ H L counter advances L ↓ L counter advances ↓ X L no change X ↑ L no change ↑ L L no change H ↓ L no change X X H nQ0, nQ1, nQ2, nQ3 = LOW HEF4518B All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 9 — 3 December 2021 3 / 13 |
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