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HEDS-9710 Datasheet(PDF) 5 Page - Agilent(Hewlett-Packard) |
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HEDS-9710 Datasheet(HTML) 5 Page - Agilent(Hewlett-Packard) |
5 / 8 page 5 Analog Encoder Interface Circuit IA-IN VREF I+ + – C R1 VA IB-IN VREF I+ + – C R1 VB VREF = 1.4 V ± 0.2 V (DC) The circuit shown can be used to convert the current output to a voltage. Resistor value, R1, and Capacitor, C, are specified to attain required gain and low-pass filtering, which are application specific. The gain is chosen to attain maximum output swing and not clamp the op-amp. VREF should be set to 1.4 V ± 0.2 V. A 0.1 µF bypass capacitor (decoupling capacitor) is recom- mended to be placed within 1 cm of the encoder for optimal power supply noise rejection. Outputs are high impedance (typical 1 M ohm) and susceptible to EMI. Ordering Information HEDS-971 Lead Configurations 0 – straight leads 1 – bent leads Resolutions R – 200 lpi Option Bracket Options 50 51 |
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Similar Description - HEDS-9710 |
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