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AN1523 APPLICATION NOTE

The output voltage regulation is performed by the secondary feedback on the 5V output. The feedback network

is the typical using a TL431 driving an optocoupler, in this case a PC817, and insuring the insulation required

by the safety regulation between primary and secondary. The opto-transistor drives directly the COMP pin of

the L6590 modulating the PWM internal block of the L6590. The stability of the 12V is guaranteed by the trans-

former coupling.

The input EMI filter is a classical LC-filter, 1-cell for differential and common mode noise. A NTC has been in-

serted in series with the bulk capacitor to prevent very high peak current at plug insertion, while a standard 5*20

fuse protects in case of catastrophic failures. The PCB type is single layer, FR-4, 2 oz (70

L6590 power dissipation is ensured by a copper area of 4 cm2 connected to primary return.

Here following some waveforms during the normal operation at full load are depicted:

The pictures of figure 1 and 2 show the drain voltage and current at the peak of the nominal input mains voltage

during normal operation at full load. The circuit works in continuous mode for the effect of the voltage ripple

across the input bulk capacitor at 115V while it goes in a depth discontinuous mode at 220V. Here are captured

the trace at the peak of the input voltage sine wave.

Figure 3 gives the measurement of the drain peak voltage at full load and maximum input mains voltage. The

voltage peak, which is 604V, guarantees a reliable operation of the L6590 thanks to a good margin against the

maximum BVDSS of the device, which is 700V. Hence, a derating of 86% is achieved in the worst mains line

condition. The maximum PIV of the diodes (on figure 4) has been measured during the worst operating condi-

tion at 265Vac and it is indicated on the right of each picture. The margin, with respect to the maximum voltage

sustained by the diodes, assures a safe operating condition for the devices, contributing to obtain a high MTBF

of the circuit, using the MIL-HDBK217 calculation method.

In figure 5 and 6 the most salient controller IC signals are represented. In both pictures, it is possible to distin-

guish clean waveforms free of hard spikes or noise that could affect the controller correct operation

Figure 1. Vds & Id @FULL LOAD

Figure 2. Vds & Id @FULL LOAD

Vin = 115 Vrms - 50 Hz

Vin = 220 Vrms - 50 Hz

CH1:

CH1:

CH4:

DRAIN CURRENT

CH4:

DRAIN CURRENT