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89H32H8G2ZCBL Datasheet(PDF) 23 Page - Renesas Technology Corp |
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89H32H8G2ZCBL Datasheet(HTML) 23 Page - Renesas Technology Corp |
23 / 41 page 23 of 40 November 28, 2011 IDT 89HPES32H8G2 Data Sheet Symbol Parameter SMBus @3.3V ±10%1 1. Data at room and hot temperature. Unit Min Max FSCL Clock frequency 5 600 KHz TBUF Bus free time between Stop and Start 3.5 — μs THD:STA Start condition hold time 1 — μs TSU:STA Start condition setup time 1 — μs TSU:STO Stop condition setup time 1 — μs THD:DAT Data hold time 1 — ns TSU:DAT Data setup time 1 — ns TTIMEOUT Detect clock low time out — 74.7 ms TLOW Clock low period 3.7 — μs THIGH Clock high period 3.7 — μs TF Clock/Data fall time — 72.2 ns TR Clock/Data rise time — 68.3 ns TPOR@10kHz Time which a device must be operational after power-on reset 20 — ms Table 21 SMBus AC Timing Data |
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