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November 28, 2011

IDT 89HPES32H8G2 Data Sheet

System Clock Parameters

Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 13 and 14.

AC Timing Characteristics

Parameter

Description

Condition

Min

Typical

Max

Unit

RefclkFREQ

Input reference clock frequency range

100

1251

1. The input clock frequency will be either 100 or 125 MHz depending on signal GCLKFSEL.

MHz

TC-RISE

Rising edge rate

Differential

0.6

4

V/ns

TC-FALL

Falling edge rate

Differential

0.6

4

V/ns

VIH

Differential input high voltage

Differential

+150

mV

VIL

Differential input low voltage

Differential

-150

mV

VCROSS

Absolute single-ended crossing point

voltage

Single-ended

+250

+550

mV

VCROSS-DELTA

Variation of VCROSS over all rising clock

edges

Single-ended

+140

mV

VRB

Ring back voltage margin

Differential

-100

+100

mV

TSTABLE

Time before VRB is allowed

Differential

500

ps

TPERIOD-AVG

Average clock period accuracy

-300

2800

ppm

TPERIOD-ABS

Absolute period, including spread-spec-

trum and jitter

9.847

10.203

ns

TCC-JITTER

Cycle to cycle jitter

150

ps

VMAX

Absolute maximum input voltage

+1.15

V

VMIN

Absolute minimum input voltage

-0.3

V

Duty Cycle

Duty cycle

40

60

%

Rise/Fall Matching

Single ended rising Refclk edge rate ver-

sus falling Refclk edge rate

20

%

ZC-DC

Clock source output DC impedance

40

60

Ω

Table 9 Input Clock Requirements

Parameter

Description

Gen 1

Gen 2

Units

Min1 Typ1 Max1 Min1 Typ1 Max1

PCIe Transmit

UI

Unit Interval

399.88

400

400.12

199.94

200

200.06

ps

TTX-EYE

Minimum Tx Eye Width

0.75

0.75

UI

TTX-EYE-MEDIAN-to-

MAX-JITTER

Maximum time between the jitter median and maximum

deviation from the median

0.125

UI

TTX-RISE, TTX-FALL

TX Rise/Fall Time: 20% - 80%

0.125

0.15

UI

TTX- IDLE-MIN

Minimum time in idle

20

20

UI

Table 10 PCIe AC Timing Characteristics (Part 1 of 2)