89H32H8G2ZCBL datasheet(7/41 Pages) RENESAS

Part #	89H32H8G2ZCBL

Description	32-Lane 8-Port PCIe® Gen2 System Interconnect Switch

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Manufacturer	RENESAS [Renesas Technology Corp]

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November 28, 2011

IDT 89HPES32H8G2 Data Sheet

GPIO[3]

I/O

General Purpose I/O.

This pin can be configured as a general purpose I/O pin.

Alternate function pin name: PART3PERSTN

Alternate function pin type: Input/Output

Alternate function: Assertion of this signal initiated a partition fundamental

reset in the corresponding partition.

GPIO[4]

I/O

General Purpose I/O.

This pin can be configured as a general purpose I/O pin.

1st Alternate function — Reserved

2nd Alternate function pin name: P0LINKUPN

2nd Alternate function pin type: Output

2nd Alternate function: Port 0 Link Up Status output.

GPIO[5]

I/O

General Purpose I/O.

This pin can be configured as a general purpose I/O pin.

1st Alternate function pin name: GPEN

1st Alternate function pin type: Output

1st Alternate function: Hot-plug general purpose even output.

2nd Alternate function pin name: P0ACTIVEN

2nd Alternate function pin type: Output

2nd Alternate function: Port 0 Link Active Status Output.

GPIO[6]

I/O

General Purpose I/O.

This pin can be configured as a general purpose I/O pin.

GPIO[7]

I/O

General Purpose I/O.

This pin can be configured as a general purpose I/O pin.

GPIO[8]

I/O

General Purpose I/O.

This pin can be configured as a general purpose I/O pin.

Alternate function pin name: IOEXPINTN

Alternate function pin type: Input

Alternate function: IO expander interrupt.

Signal

Type

Name/Description

CLKMODE[2:0]

Clock Mode. These signals determine the port clocking mode used by

ports of the device.

GCLKFSEL

I

Global Clock Frequency Select. These signals select the frequency of

the GCLKP and GCLKN signals.

0x0 100 MHz

0x1 125 MHz

P01MERGEN

I

Port 0 and 1 Merge. P01MERGEN is an active low signal. It is pulled low

internally. When this pin is low, port 0 is merged with port 1 to form a single

x8 port. The Serdes lanes associated with port 1 become lanes 4 through 7

of port 0. When this pin is high, port 0 and port 1 are not merged, and each

operates as a single x4 port.

P23MERGEN

I

Port 2 and 3 Merge. P23MERGEN is an active low signal. It is pulled low

internally. When this pin is low, port 2 is merged with port 3 to form a single

x8 port. The Serdes lanes associated with port 3 become lanes 4 through 7

of port 2. When this pin is high, port 2 and port 3 are not merged, and each

operates as a single x4 port.

Table 5 System Pins (Part 1 of 2)

Signal

Type

Name/Description

Table 4 General Purpose I/O Pins (Part 2 of 2)

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