 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MC68HC912BL16 Datasheet(PDF) 28 Page - NXP Semiconductors |
|
||||||||||||||||||||||||||||||
MC68HC912BL16 Datasheet(HTML) 28 Page - NXP Semiconductors |
|
|
28 / 128 page  MC68HC912BL16 28 MC68HC912BL16TS/D EME — Emulate Port E Removing the registers from the map allows the user to emulate the function of these registers exter- nally. In single-chip mode PORTE and DDRE are always in the map regardless of the state of this bit. 0 = PORTE and DDRE are in the memory map. 1 = PORTE and DDRE are removed from the internal memory map (expanded mode). Normal modes: write once; special modes: write anytime EXCEPT the first time. Read anytime. 5.3 Internal Resource Mapping The internal register block, RAM, Flash EEPROM and EEPROM have default locations within the 64- Kbyte standard address space but may be reassigned to other locations during program execution by setting bits in mapping registers INITRG, INITRM, and INITEE. During normal operating modes these registers can be written once. It is advisable to explicitly establish these resource locations during the initialization phase of program execution, even if default values are chosen, in order to protect the reg- isters from inadvertent modification later. Writes to the mapping registers go into effect between the cycle that follows the write and the cycle after that. To assure that there are no unintended operations, a write to one of these registers should be fol- lowed with a NOP instruction. If conflicts occur when mapping resources, the register block will take precedence over the other re- sources; RAM, Flash EEPROM, or EEPROM addresses occupied by the register block will not be avail- able for storage. When active, BDM ROM takes precedence over other resources although a conflict between BDM ROM and register space is not possible. Table 10 shows resource mapping precedence. In expanded modes, all address space not utilized by internal resources is by default external memory. 5.3.1 Register Block Mapping After reset the 512 byte register block resides at location $0000 but can be reassigned to any 2-Kbyte boundary within the standard 64-Kbyte address space. Mapping of internal registers is controlled by five bits in the INITRG register. The register block occupies the first 512 bytes of the 2-Kbyte block. REG[15:11] — Internal register map position These bits specify the upper five bits of the 16-bit registers address. Write once in normal modes or anytime in special modes. Read anytime. MMSWAI — Memory Mapping Interface Stop in Wait Control This bit controls access to the memory mapping interface when in Wait mode. Table 10 Mapping Precedence Precedence Resource 1 BDM ROM (if active) 2 Register Space 3 RAM 4 EEPROM 5 Flash EEPROM 6 External Memory INITRG — Initialization of Internal Register Position Register $0011 Bit 7 6 5 4 3 2 1 Bit 0 REG15 REG14 REG13 REG12 REG11 0 0 MMSWAI RESET: 0 0 0 0 0 0 0 0 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
Similar Part No. - MC68HC912BL16 |
|
Similar Description - MC68HC912BL16 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
