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DA14530 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 333 page DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 10 of 332 © 2021 Renesas Electronics Tables Table 1: DA14530 FCGQFN24 Pin Description .................................................................................. 20 Table 2: Absolute Maximum Ratings................................................................................................... 25 Table 3: Recommended Operating Conditions ................................................................................... 25 Table 4: DC Characteristics................................................................................................................. 25 Table 5: Timing Characteristics ........................................................................................................... 26 Table 6: RCX Oscillator - Timing Characteristics ................................................................................ 26 Table 7: XTAL32MHz Oscillator - Recommended Operating Conditions ........................................... 27 Table 8: XTAL oscillator 32kHz - Recommended Operating Conditions ............................................ 28 Table 9: XTAL oscillator 32kHz - Timing Characteristics .................................................................... 28 Table 10: RC32MHz Oscillaor - Timing Characteristics...................................................................... 28 Table 11: Digital Pad - Recommended Operating Conditions ............................................................ 28 Table 12: Digital Pad - DC Characteristics.......................................................................................... 29 Table 13: Digital Pad with LPF - DC Characteristics........................................................................... 29 Table 14: Digital Pad with LPF - Recommended Operating Conditions ............................................. 29 Table 15: POR VBAT_LOW - DC Characteristics............................................................................... 30 Table 16: POR VBAT_HIGH - DC Characteristics .............................................................................. 30 Table 17: GP ADC - Recommended Operating Conditions ................................................................ 30 Table 18: GP ADC - DC Characteristics ............................................................................................. 30 Table 19: GP ADC - Electrical performance........................................................................................ 31 Table 20: Temperature Sensor - DC Characteristics .......................................................................... 31 Table 21: BLE 1Mb/s specifications - Recommended Operating Conditions ..................................... 32 Table 22: BLE 1Mb/s specifications - AC Characteristics ................................................................... 32 Table 23: BLE 1Mb/s specifications - Timing Characteristics ............................................................. 35 Table 24: BLE 1Mb/s specifications - DC Characteristics................................................................... 35 Table 25: Power Domains Description ................................................................................................ 39 Table 26: Power Modes, Digital Power Domains, Clocks, and Wake-up triggers .............................. 40 Table 27: VDD_Clamp recommended settings over temperature and load ....................................... 41 Table 28: Retainable Registers ........................................................................................................... 41 Table 29: OTP Header ........................................................................................................................ 44 Table 30: CS Commands and Description .......................................................................................... 46 Table 31: CS Example......................................................................................................................... 47 Table 32: Booting Sequence Steps..................................................................................................... 49 Table 33: Reset Signals and Registers ............................................................................................... 51 Table 34: Interrupt List......................................................................................................................... 55 Table 35: Arm Documents List ............................................................................................................ 57 Table 36: Memory Map........................................................................................................................ 60 Table 37: Generated Clocks Description............................................................................................. 65 Table 38: DMA Served Peripherals..................................................................................................... 74 Table 39: I2C Definition of Bits in First Byte in 10-bit Address Format ............................................... 82 Table 40: UART Baud Rate Generation.............................................................................................. 89 Table 41: UART Interrupt Priorities ..................................................................................................... 90 Table 42: SPI Modes Configuration and SCK States.......................................................................... 95 Table 43: SPI Timing Parameters ....................................................................................................... 96 Table 44: Fixed Assignment of Specific Signals ............................................................................... 124 Table 45: ADC Input Channels.......................................................................................................... 128 Table 46: GPADC External Input Channels and Voltage Range ...................................................... 128 Table 47: ADC_LDO Start-Up Delay................................................................................................. 130 Table 48: ADC Sampling Time Constant ( τADC_SMPL)......................................................................... 131 Table 49: ENOB in Oversampling Mode ........................................................................................... 132 Table 50: GPADC Calibration Procedure for Single-Ended and Differential Modes......................... 133 Table 51: Common Mode Adjustment............................................................................................... 134 Table 52: Register map anamisc2632_bif_00................................................................................... 145 Table 53: CLK_REF_SEL_REG (0x50001600) ................................................................................ 145 Table 54: CLK_REF_CNT_REG (0x50001602)................................................................................ 146 |
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