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DA14530 Datasheet(PDF) 98 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 98 Page - Renesas Technology Corp |
98 / 333 page ![]() DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 98 of 332 © 2021 Renesas Electronics 16 Quadrature Decoder 16.1 Introduction The DA14530 has an integrated Quadrature decoder that can automatically decode the signals for the X, Y, and Z axes of a HID input device, reporting step count and direction. It can also be programmed to simply count rising/falling edges on any of the channel pairs. This block can be used to wake up the chip as soon as there is a movement from the connected external device. The block diagram of the quadrature decoder is presented in Figure 42. Features ● Three 16-bit signed counters that provide the step count and direction on each of the axes (X, Y, and Z) and one 8-bit counter counting the overall edges from all the three counters ● Programmable system clock sampling at a maximum of 16 MHz ● APB interface for control and programming ● Programmable source from the GPIOs ● Digital filter on the channel inputs to avoid spikes Register File 16-bit Counter (X Axis) QD_CHA_X QD_CHB_X 16-bit Counter (Y Axis) QD_CHA_Y QD_CHB_Y 16-bit Counter (Z Axis) QD_CHA_Z QD_CHB_Z Interrupt Generator APB Interface Quad_Dec_IRQn Figure 42: Quadrature Decoder Block Diagram 16.2 Architecture Channels are expected to provide a pulse train with 90 degrees rotation as displayed in Figure 43 and Figure 44. |
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