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DA14530 Datasheet(PDF) 97 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 97 Page - Renesas Technology Corp |
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97 / 333 page  DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 97 of 332 © 2021 Renesas Electronics 15.3.2 Slave Mode 1. Set the appropriate GPIO ports in SPI clock mode (input), SPI Chip Select mode (input), SPI Data Out mode (output), and SPI Data In mode (input). 2. Enable SPI clock by setting CLK_PER_REG[SPI_ENABLE] = 1. 3. Reset SPI FIFO by setting SPI_CTRL_REG[SPI_FIFO_RESET] = 1. 4. Set the SPI mode (CPOL or CPHA) by programming SPI_CONFIG_REG[SPI_MODE]. 5. Set the SPI module in slave controller by setting SPI_CONFIG_REG[SPI_SLAVE_EN] = 1. 6. Define the SPI word length (from 4-bit to 32-bit) by programming SPI_CONFIG_REG[SPI_WORD_LENGTH]. SPI_WORD_LENGTH = word length - 1. To read/write the following sequence has to be performed: 1. Set SPI FIFO in normal operation by setting SPI_CTRL_REG[SPI_FIFO_RESET] = 0. 2. Enable SPI TX path by setting SPI_CTRL_REG[SPI_TX_EN] = 1. 3. Enable SPI RX path by setting SPI_CTRL_REG[SPI_RX_EN] = 1. 4. Enable the SPI controller by setting SPI_CTRL_REG[SPI_EN] = 1. 5. Write the first data byte directly to TX buffer by programming the SPI_TXBUFFER_FORCE_L_REG[SPI_TXBUFFER_FORCE_L]. 6. Write the rest of the data to TX FIFO by programming SPI_FIFO_WRITE_REG[SPI_FIFO_WRITE]. Write access is permitted only if SPI_FIFO_STATUS_REG[SPI_TX_FIFO_FULL] = 0. 7. Read from RX FIFO by programming SPI_FIFO_READ_REG[SPI_FIFO_READ]. Read is permitted only if SPI_FIFO_STATUS_REG[SPI_RX_FIFO_EMPTY] = 0. |
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