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DA14530 Datasheet(PDF) 91 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 91 Page - Renesas Technology Corp |
91 / 333 page DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 91 of 332 © 2021 Renesas Electronics interrupts and LSR[5] function normally (both reflecting an empty THR or FIFO). The flowchart of THRE interrupt generation when not in programmable THRE interrupt mode is shown in Figure 39. FIFO LEVEL > TX Empty Trigger? Y N CLEAR INTR THRE Interrupt Enabled? Y N SET INTR FIFO LEVEL > TX Empty Trigger? Y For the THRE interrupt to be controlled as shown here, the following must be true: - FIFO_MODE!=NONE - THRE_MODE==Enabled - FIFOs enabled (FCR[0]==1) - THRE mode enabled (IER[7]==1) Under the condition that there are no other pending interrupts, the interrupt signal (intr) is asserted N Figure 38: Flowchart of Interrupt Generation for Programmable THRE Interrupt Mode |
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