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DA14530 Datasheet(PDF) 86 Page - Renesas Technology Corp

Part # DA14530
Description  Low Power Bluetooth 5.1 SoC
Download  333 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

DA14530 Datasheet(HTML) 86 Page - Renesas Technology Corp

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DA14530
Low Power Bluetooth 5.1 SoC
Final
Datasheet
Revision 3.4
21-Dec-2021
CFR0011-120-00
86 of 332
© 2021 Renesas Electronics
Figure 34: Multiple Master Clock Synchronization
13.3 Programming
To configure and use the I2C Controller, follow the simple sequence of steps below:
1. Set up the GPIOs to be used for the I2C interface (P0x_MODE_REG[PID] = 9 or 10).
2. Enable the clock for the I2C Controller (CLK_PER_REG[I2C_ENABLE] = 0x1).
3. Disable the I2C Controller (I2C_ENABLE_REG = 0).
4. Configure the I2C clock frequency:
a. Standard mode (100 kbit/s) : I2C_CON_REG[I2C_SPEED] = 1.
b. Full speed mode (400 kbit/s) : I2C_CON_REG[I2C_SPEED] = 2.
5. Setup the I2C Controller as:
a. Master: I2C_CON_REG[I2C_MASTER_MODE] = 1 and
I2C_CON_REG[I2C_SLAVE_DISABLE] = 1.
b. Slave: I2C_CON_REG[I2C_MASTER_MODE] = 0 and
I2C_CON_REG[I2C_SLAVE_DISABLE] = 0.
6. Choose whether the controller starts its transfers in the 7-bit or 10-bit addressing format when
acting as a master (I2C_CON_REG[I2C_10BITADDR_MASTER]) or whether the controller
responds to the 7-bit or 10-bit addresses when acting as a slave
(I2C_CON_REG[I2C_10BITADDR_SLAVE]).
7. Set target slave address in:
a. Master mode (I2C_TAR_REG[IC_TAR] = 0x55 (default)).
b. Slave mode (I2C_SAR_REG[IC_SAR] = 0x55 (default)).
8. Set the threshold levels on RX and TX FIFO (I2C_RX_TL_REG and I2C_TX_TL_REG).
9. Enable the required interrupts (I2C_INTR_MASK_REG).
10. Enable the I2C Controller (I2C_ENABLE_REG = 0x1).
11. Read a byte:
a. Prepare to transmit the read command byte (I2C_DATA_CMD_REG[I2C_CMD] = 1).
b. Wait until TX FIFO is empty (I2C_STATUS_REG[TFE] = 1).
c. Wait until master has finished reading the byte from slave device
(I2C_STATUS_REG[MST_ACTIVITY] = 0).
12. Write a byte:
a. Prepare to transmit the write command byte (I2C_DATA_CMD_REG[I2C_CMD] = 0 and
I2C_DATA_CMD_REG[I2C_DAT] = command byte).
b. Wait until TX FIFO is empty (I2C_STATUS_REG[TFE] = 1).
c. Wait until master has finished reading the response byte from slave device
(I2C_STATUS_REG[MST_ACTIVITY] = 0).


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