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DA14530 Datasheet(PDF) 79 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 79 Page - Renesas Technology Corp |
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79 / 333 page  DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 79 of 332 © 2021 Renesas Electronics ● Slave State Machine: it generates the I2C protocol for the slave transfers ● Clock Generator: it calculates the required time to do the following: ○ Generate the SCL clock when configured as a master ○ Check for bus idle ○ Generate a START and a STOP ○ Set up the data and hold the data ● Rx Shift: it takes data into the design and extracts it in byte format ● Tx Shift: it presents data supplied by CPU for transfer on the I2C bus ● Rx Filter: it detects the events in the bus, for example, start, stop, and arbitration lost ● Toggle: it generates pulses on both sides and toggles to transfer signals across clock domains ● Synchronizer: it transfers signals from one clock domain to another ● Interrupt Controller: it generates the raw interrupt and interrupt flags, allowing them to be set and cleared. ● RX FIFO/TX FIFO: it holds the RX FIFO and TX FIFO register banks and controllers along with their status levels. 13.2.1 I2C Bus Terms The following terms relate to what the role of a I2C device is and how it interacts with other I2C devices on the bus. ● Transmitter is the device that sends data to the bus. A transmitter can either initiate the data transmission to the bus (a master-transmitter) or respond to a request from the master to send data back (a slave-transmitter) ● Receiver is the device that receives data from the bus. A receiver can either receive data on its own request (a master-receiver) or respond to a request from the master to receive data (a slave- receiver) ● Master is the component that initializes a transfer (START command), generates the clock (SCL) signal, and terminates the transfer (STOP command). A master can be either a transmitter or a receiver ● Slave is the device addressed by the master. A slave can be either a receiver or a transmitter These concepts are illustrated in Figure 25. Figure 25: Master/Slave and Transmitter/Receiver Relationships ● Multi-master means the ability for more than one master to co-exist on the bus at the same time without collision or data loss ● Arbitration is the predefined procedure that authorizes only one master at a time to take control of the bus. For more information, refer to section 13.2.4 ● Synchronization is the predefined procedure that synchronizes the clock signals provided by two or more masters. For more information, refer to section 13.2.5 |
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