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DA14530 Datasheet(PDF) 78 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 78 Page - Renesas Technology Corp |
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78 / 333 page  DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 78 of 332 © 2021 Renesas Electronics 13 I2C Interface 13.1 Introduction The I2C Interface is a programmable control bus that provides support for the communications link between Integrated Circuits in a system. It is a simple two-wire bus with a software-defined protocol for system control, which is used in temperature sensors and voltage level translators to EEPROMs, general-purpose I/O, and A/D and D/A converters. Features ● Two-wire I2C serial interface consisting of a serial data line (SDA) and a serial clock (SCL) ● Two speeds are supported: ○ Standard mode (0 to 100 kbit/s) ○ Fast mode (≤ 400 kbit/s) ● Clock synchronization ● 32 locations deep transmit/receive FIFOs (32× 8-bit Rx and 32× 10-bit Tx) ● Master transmit and Master receive operation ● Slave transmit and Slave receive operation ● 7-bit or 10-bit addressing ● 7-bit or 10-bit combined format transfers ● Bulk transmit mode ● Default slave address of 0x055 ● Interrupt or polled-mode operation ● Handles bit and byte waiting at both bus speeds ● Programmable SDA hold time ● DMA support Figure 24: I2C Controller Block Diagram 13.2 Architecture The I2C Controller block diagram is shown in Figure 24. It contains the following sub-blocks: ● AMBA Bus Interface Unit: it accesses the register file via the APB interface ● Register File: it contains configuration registers and is the interface with SW ● Master State Machine: it generates the I2C protocol for the master transfers |
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