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DA14530 Datasheet(PDF) 7 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 333 page  DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 7 of 332 © 2021 Renesas Electronics 25.2.2 General Purpose Port Registers........................................................................ 124 25.2.2.1 Port Data Register ......................................................................... 124 25.2.2.2 Port Set Data Output Register....................................................... 124 25.2.2.3 Port Reset Data Output Register................................................... 124 25.2.3 Fixed Assignment Functionality......................................................................... 124 25.2.4 Types of GPIO Pads.......................................................................................... 125 25.2.5 Driving Strength ................................................................................................. 126 26 General Purpose ADC............................................................................................................... 127 26.1 Introduction ....................................................................................................................... 127 26.2 Architecture ....................................................................................................................... 127 26.2.1 Input Channels................................................................................................... 128 26.2.2 Operating Modes ............................................................................................... 129 26.2.2.1 Enabling the ADC .......................................................................... 130 26.2.2.2 Manual Mode ................................................................................. 130 26.2.2.3 Continuous Mode........................................................................... 130 26.2.3 Conversion Modes............................................................................................. 130 26.2.3.1 AD Conversion............................................................................... 130 26.2.3.2 Averaging....................................................................................... 132 26.2.3.3 Chopper Mode ............................................................................... 132 26.2.4 Additional Settings ............................................................................................. 132 26.2.5 Non-Ideal Effects ............................................................................................... 133 26.2.6 Offset Calibration ............................................................................................... 133 26.2.7 Zero-Scale Adjustment ...................................................................................... 133 26.2.8 Common Mode Adjustment ............................................................................... 134 26.2.9 Input Impedance, Inductance, and Input Settling .............................................. 134 26.3 Programming..................................................................................................................... 134 27 Real Time Clock (RTC).............................................................................................................. 135 27.1 Introduction ....................................................................................................................... 135 27.2 Architecture ....................................................................................................................... 135 27.3 Programming..................................................................................................................... 136 28 Power.......................................................................................................................................... 137 28.1 LDOs ................................................................................................................................. 137 28.2 POR Circuit ....................................................................................................................... 137 29 BLE Core .................................................................................................................................... 138 29.1 Architecture ....................................................................................................................... 138 29.1.1 Exchange Memory............................................................................................. 138 29.2 Programming..................................................................................................................... 139 29.2.1 Wake-Up IRQ .................................................................................................... 139 29.2.2 Switch from BLE Active Mode to BLE Deep Sleep Mode ................................. 139 29.2.3 Switch from BLE Deep Sleep Mode to BLE Active Mode ................................. 140 29.2.3.1 Switching at an Anchor Point......................................................... 140 29.2.3.2 Switching Due to an External Event .............................................. 142 30 Radio........................................................................................................................................... 143 30.1 Introduction ....................................................................................................................... 143 30.2 Architecture ....................................................................................................................... 143 30.2.1 Receiver............................................................................................................. 143 |
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