 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DA14530 Datasheet(PDF) 66 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
DA14530 Datasheet(HTML) 66 Page - Renesas Technology Corp |
|
|
66 / 333 page  DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 66 of 332 © 2021 Renesas Electronics 10.1.1 General Clock Constraints There are certain constraints on various clocks regarding their frequency relations or the effectiveness. This section summarizes these rules: ● The minimum of the AMBA clock (hclk) has to be 8 MHz when BLE is utilized. This is also the clock of the Cortex CPU and ensures the required MIPS for handling the BLE Protocol ● The AMBA clock (hclk) should always be greater or equal to the ble_*_clks. This is required for the proper operation of the BLE protocol. For example, hclk at 16 MHz and BLE clocks at 8 MHz is an acceptable combination but not the other way around 10.2 Crystal Oscillators The Digital Controlled XTAL Oscillators (DXCO) are designed for low power consumption and high stability. There are two such crystal oscillators in the system, one at 32 MHz (XTAL32M) and the other at 32.768 kHz (XTAL32K). The XTAL32K has no trimming capabilities and is used as the clock of the Deep Sleep/Extended Sleep modes. The XTAL32M can be trimmed. The principle schematic of the two oscillators is shown in Figure 18. No external components to the DA14530 are required other than the crystal itself. If the crystal has a case connection, it is advised to connect the case to ground. 32 MHz 32.768 kHz CL = 4pF - 8 pF clock32MHz clock32KHz Figure 18: Crystal Oscillator Circuits 10.2.1 Frequency Control (32 MHz Crystal) The 8-bit register CLK_FREQ_TRIM_REG controls the trimming of the 32 MHz crystal oscillator. The frequency is trimmed by two on-chip variable capacitor banks. Both capacitor banks are controlled by the same register. The capacitance of both variable capacitor banks varies from the minimum to the maximum value in 256 equal steps. With CLK_FREQ_TRIM_REG[XTAL32M_TRIM] = 0x00, the minimum capacitance and thus the maximum frequency are selected. With CLK_FREQ_TRIM_REG[XTAL32M_TRIM] = 0xFF, the maximum capacitance and thus the minimum frequency are selected. The five least significant bits of CLK_FREQ_TRIM_REG register (XTAL32M_TRIM<4:0>) directly control five binary weighted capacitors (Figure 19). The three most significant bits of CLK_FREQ_TRIM_REG register (XTAL32M_TRIM<7:5>) are binary to the thermometer decoded. Each of the seven outputs of the decoder controls a capacitor, of which the value is 32 times the value of the smallest capacitor. |
Similar Part No. - DA14530 |
|
Similar Description - DA14530 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
