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DA14530 Datasheet(PDF) 60 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 60 Page - Renesas Technology Corp |
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60 / 333 page  DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 60 of 332 © 2021 Renesas Electronics 8 Memory Map Table 36: Memory Map Address Description Power Domain 0x00000000 0x04000000 Boot/BLE ROM/OTP/RAM Remapped address space based on SYS_CTRL_REG[REMAP_ADR0]. 0x04000000 0x07F00000 RESERVED 0x07F00000 0x07F24000 Boot/BLE ROM Contains Boot ROM code and BLE protocol related code. 0x07F24000 0x07F40000 RESERVED 0x07F40000 0x07F40100 OTP-Regs Contains the control registers of the OTP Subsystem. PD_SYS 0x07F40100 0x07F80000 RESERVED 0x07F80000 0x07F88000 OTP Contains the OTP cell actual memory space. 0x07F88000 0x07F C0000 RESERVED 0x07FC0000 0x07FCC000 System RAM 48 kB. Contains application code, data for the application, stack, and heap. SysRAM1 (16 kB): 0x07FC0000 to 0x07FC3FFF SysRAM2 (12 kB): 0x07FC4000 to 0x07FC6FFF SysRAM3 (20 kB): 0x07FC7000 to 0x07FCBFFF 0x07FD8000 0x40000000 RESERVED 0x40000000 0x40001000 AHB/BLE-Regs Contains the control registers of the BLE Link Layer Processor. PD_RAD 0x40001000 0x40004000 AHB/Radio PD_RAD 0x40004000 0x50000000 RESERVED 0x50000000 0x50000100 APB16/PMU-CRG Contains the control registers of the Power Management Unit and the Clock Generator. PD_SLP 0x50000100 0x50000200 APB16/wake-up Contains the registers of the clocked and clock-less wake up controllers. PD_SLP 0x50000200 0x50000300 APB16/Quadrature Decoder Contains Logic that implements a step counter for X and Y axis from a rotary encoder. PD_SLP 0x50000300 0x50001000 RESERVED |
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