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DA14530 Datasheet(PDF) 5 Page - Renesas Technology Corp |
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DA14530 Datasheet(HTML) 5 Page - Renesas Technology Corp |
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5 / 333 page  DA14530 Low Power Bluetooth 5.1 SoC Final Datasheet Revision 3.4 21-Dec-2021 CFR0011-120-00 5 of 332 © 2021 Renesas Electronics 12.3 Programming....................................................................................................................... 76 12.3.1 Memory to Memory Transfers ............................................................................. 76 12.3.2 Peripheral to Memory Transfers .......................................................................... 76 13 I2C Interface ................................................................................................................................. 78 13.1 Introduction ......................................................................................................................... 78 13.2 Architecture ......................................................................................................................... 78 13.2.1 I2C Bus Terms..................................................................................................... 79 13.2.1.1 Bus Transfer Terms ......................................................................... 80 13.2.2 I2C Behavior ........................................................................................................ 80 13.2.2.1 START and STOP Generation ........................................................ 81 13.2.2.2 Combined Formats .......................................................................... 81 13.2.3 I2C Protocols ....................................................................................................... 81 13.2.3.1 START and STOP Conditions ......................................................... 81 13.2.3.2 Addressing Slave Protocol .............................................................. 82 13.2.3.3 Transmitting and Receiving Protocols ............................................. 83 13.2.4 Multiple Master Arbitration ................................................................................... 84 13.2.5 Clock Synchronization ......................................................................................... 85 13.3 Programming....................................................................................................................... 86 14 UART............................................................................................................................................. 87 14.1 Introduction ......................................................................................................................... 87 14.2 Architecture ......................................................................................................................... 88 14.2.1 UART (RS232) Serial Protocol ............................................................................ 88 14.2.2 Clock Support ...................................................................................................... 89 14.2.3 Interrupts.............................................................................................................. 89 14.2.4 Programmable THRE Interrupt............................................................................ 90 14.2.5 Shadow Registers................................................................................................ 92 14.2.6 Direct Test Mode ................................................................................................. 92 14.3 Programming....................................................................................................................... 92 15 SPI Interface................................................................................................................................. 94 15.1 Introduction ......................................................................................................................... 94 15.2 Architecture ......................................................................................................................... 95 15.2.1 SPI Timing ........................................................................................................... 95 15.3 Programming....................................................................................................................... 96 15.3.1 Master Mode........................................................................................................ 96 15.3.2 Slave Mode.......................................................................................................... 97 16 Quadrature Decoder.................................................................................................................... 98 16.1 Introduction ......................................................................................................................... 98 16.2 Architecture ......................................................................................................................... 98 16.3 Programming..................................................................................................................... 100 17 Clockless Wakeup Controller................................................................................................... 101 17.1 Introduction ....................................................................................................................... 101 17.2 Architecture ....................................................................................................................... 101 17.3 Programming..................................................................................................................... 102 18 Clocked Wakeup Controller ..................................................................................................... 103 18.1 Introduction ....................................................................................................................... 103 |
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