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87C552 Datasheet(PDF) 12 Page - NXP Semiconductors |
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87C552 Datasheet(HTML) 12 Page - NXP Semiconductors |
12 / 24 page Philips Semiconductors Product specification 87C552 80C51 8-bit microcontroller 8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O 1998 May 01 12 AC ELECTRICAL CHARACTERISTICS (Continued) SYMBOL PARAMETER INPUT OUTPUT I2C Interface (Refer to Figure 9)5 tHD;STA START condition hold time ≥ 14 tCLCL > 4.0 µs 1 tLOW SCL low time ≥ 16 tCLCL > 4.7 µs 1 tHIGH SCL high time ≥ 14 tCLCL > 4.0 µs 1 tRC SCL rise time ≤ 1µs – 2 tFC SCL fall time ≤ 0.3µs < 0.3 µs 3 tSU;DAT1 Data set-up time ≥ 250ns > 20 tCLCL – tRD tSU;DAT2 SDA set-up time (before rep. START cond.) ≥ 250ns > 1 µs 1 tSU;DAT3 SDA set-up time (before STOP cond.) ≥ 250ns > 8 tCLCL tHD;DAT Data hold time ≥ 0ns > 8 tCLCL – tFC tSU;STA Repeated START set-up time ≥ 14 tCLCL > 4.7 µs 1 tSU;STO STOP condition set-up time ≥ 14 tCLCL > 4.0 µs 1 tBUF Bus free time ≥ 14 tCLCL > 4.7 µs 1 tRD SDA rise time ≤ 1µs – 2 tFD SDA fall time ≤ 0.3µs < 0.3 µs 3 NOTES: 1. At 100 kbit/s. At other bit rates this value is inversely proportional to the bit-rate of 100 kbit/s. 2. Determined by the external bus-line capacitance and the external bus-line pull-resistor, this must be < 1 µs. 3. Spikes on the SDA and SCL lines with a duration of less than 3 tCLCL will be filtered out. Maximum capacitance on bus-lines SDA and SCL = 400pF. 4. tCLCL = 1/fOSC = one oscillator clock period at pin XTAL1. For 62ns (42s) < tCLCL < 285ns (16MHz (24Hz) > fOSC > 3.5MHz) the SI01 interface meets the I2C-bus specification for bit-rates up to 100 kbit/s. 5. These values are guaranteed but not 100% production tested. |
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