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83C752 Datasheet(PDF) 14 Page - NXP Semiconductors |
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83C752 Datasheet(HTML) 14 Page - NXP Semiconductors |
14 / 24 page Philips Semiconductors Product specification 83C752/87C752 80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8 bit A/D, I2C, PWM, low pin count 1998 May 01 14 DC ELECTRICAL CHARACTERISTICS (Continued) Tamb = 0°C to +70°C or –40°C to +85°C, AVCC = 5V ±5, AVSS = 0V4 VCC = 5V ± 10%, VSS = 0V TEST LIMITS4 SYMBOL PARAMETER CONDITIONS MIN Typical1 MAX UNIT Analog Inputs (A/D guaranteed only with quartz window covered.) AVCC Analog supply voltage10 AVCC = VCC±0.2V 4.5 5.5 V AICC Analog operating supply current AVCC = 5.12V 39 mA AVIN Analog input voltage12 AVSS–0.2 AVCC+0.2 V CIA Analog input capacitance 15 pF tADS Sampling time 8tCY s tADC Conversion time 40tCY s R Resolution 8 bits ERA Relative accuracy ±1 LSB OSe Zero scale offset ±1 LSB Ge Full scale gain error 0.4 % MCTC Channel to channel matching ±1 LSB Ct Crosstalk 0–100kHz –60 dB NOTES: 1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section of this specification is not implied. 2. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL per port pin: 10mA (NOTE: This is 85 °C spec.) Maximum IOL per 8-bit port: 26mA Maximum total IOL for all outputs: 67mA If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 3. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima. 4. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise noted. 5. Power-down ICC is measured with all output pins disconnected; port 0 = VCC; X2, X1 n.c.; RST = VSS. 6. ICC is measured with all output pins disconnected; X1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC – 0.5V; X2 n.c.; RST = port 0 = VCC. ICC will be slightly higher if a crystal oscillator is used. 7. Idle ICC is measured with all output pins disconnected; X1 driven with tCLCH, tCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC – 0.5V; X2 n.c.; port 0 = VCC; RST = VSS. 8. Load capacitance for ports = 80pF. 9. The resistor ladder network is not disconnected in the power down or idle modes. Thus, to conserve power, the user may remove AVCC. 10. If the A/D function is not required, or if the A/D function is only needed periodically, AVCC may be removed without affecting the operation of the digital circuitry. Contents of ADCON and ADAT are not guaranteed to be valid. If AVCC is removed, the A/D inputs must be lowered to less than 0.5V. Digital inputs on P1.0–P1.4 will not function normally. 11. These parameters do not apply to P1.0–P1.4 if the A/D function is enabled. 12. The input voltage slew rate should be <10V/ms. The maximum slew rate depends on the clock frequency of the microcontroller. Designers should use low pass filters before the A/D inputs as a precaution to noise edges causing false readings. |
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