REV. E

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REF19x Series

Precision Micropower, Low Dropout

Voltage References

PIN CONFIGURATIONS

8-Lead Narrow-Body SOIC and TSSOP

(S Suffix and RU Suffix)

TP

SLEEP

GND

NC

NC

OUTPUT

TP

1

2

3

4

8

7

6

5

REF19x

SERIES

TOP VIEW

(Not to Scale)

NC = NO CONNECT

TP PINS ARE FACTORY TEST POINTS,

NO USER CONNECTION

8-Lead Epoxy DIP (P Suffix)

TP

SLEEP

GND

NC = NO CONNECT

TP PINS ARE FACTORY TEST POINTS,

NO USER CONNECTION

NC

NC

OUTPUT

TP

1

2

3

4

8

7

6

5

REF19x

SERIES

TOP VIEW

(Not to Scale)

FEATURES

Initial Accuracy:

2 mV Max

Temperature Coefficient: 5 ppm/ C Max

Low Supply Current: 45

A Max

Sleep Mode: 15

A Max

Low Dropout Voltage

Load Regulation: 4 ppm/mA

Line Regulation: 4 ppm/V

High Output Current: 30 mA

Short Circuit Protection

APPLICATIONS

Portable Instrumentation

A-to-D and D-to-A Converters

Smart Sensors

Solar Powered Applications

Loop Current Powered Instrumentations

GENERAL DESCRIPTION

REF19x series precision band gap voltage references use a pat-

ented temperature drift curvature correction circuit and laser

trimming of highly stable thin film resistors to achieve a very low

temperature coefficient and a high initial accuracy.

The REF19x series is made up of micropower, Low Dropout

Voltage (LDV) devices providing a stable output voltage from

supplies as low as 100 mV above the output voltage and consum-

ing less than 45

µA of supply current. In sleep mode, which is

enabled by applying a low TTL or CMOS level to the sleep pin,

the output is turned off and supply current is further reduced to

less than 15

µA.

The REF19x series references are specified over the extended

industrial temperature range (–40

°C to +85°C) with typical

performance specifications over –40

°C to +125°C for applications

such as automotive.

All electrical grades are available in 8-lead SOIC; the PDIP and

TSSOP are only available in the lowest electrical grade. Products

are also available in die form.

Test Pins (TP)

The test pins, Pin 1 and Pin 5, are reserved for in-package

Zener-zap. To achieve the highest level of accuracy at the output,

the Zener-zapping technique is used to trim the output voltage.

Since each unit may require a different amount of adjustment, the

resistance value at the test pins will vary widely from pin to pin as

well as from part to part. The user should not make any physical

nor electrical connections to Pin 1 and Pin 5.

Table I.

Part

Nominal Output

Number

Voltage (V)

REF191

2.048

REF192

2.50

REF193

3.00

REF194

4.50

REF195

5.00

REF196

3.30

REF198

4.096

ORDERING GUIDE

Temperature

Package

Package

Model

Range

Description

Option

1

REF19xGP

–40

°C to +85°C

8-Lead Plastic DIP

2

N-8

REF19xES

3

–40

°C to +85°C

8-Lead SOIC

SOIC-8

REF19xFS

3

–40

°C to +85°C

8-Lead SOIC

SOIC-8

REF19xGS

–40

°C to +85°C

8-Lead SOIC

SOIC-8

REF19xGRU

°C to +85°C

8-Lead TSSOP

RU-8

REF19xGBC

25

°CDICE

NOTES