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TPA3118D2DAP Datasheet(PDF) 13 Page - Texas Instruments |
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TPA3118D2DAP Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 45 page  + – + – + – + + SDZ MUTE TTL Buffer Gain Control GAIN OUTPR_FB RINP RINN Gain Control OUTPNR_FB FAULTZ SYNC GAIN/SLV AM<2:0> PLIMIT AVCC GVDD LDO Regulator LINP LINN GND Input Sense PBTL Select OUTPL_FB Gain Control OUTNL_FB AVDD GVDD PLIMIT Reference Ramp Generator Biases and References Startup Protection Logic SC Detect DC Detect Thermal Detect UVLO/OVLO PVCC GVDD PVCC Gate Drive OUTNL_ FB PVCC GVDD PVCC Gate Drive PWM Logic Modulation and PBTL Select OUTPL_FB GND OUTPL BSPL GND OUTNL BSNL GND BSNR OUTPR GND OUTNR OUTNR_ FB BSPR OUTPR_FB PVCC GVDD PVCC Gate Drive PVCC GVDD PVCC Gate Drive PWM Logic Modulation and PBTL Select PLIMIT PLIMIT + – + – + – + – + – + – – – Thermal Pad + – PVCC PVCC Copyright © 2016, Texas Instruments Incorporated 13 TPA3116D2, TPA3118D2, TPA3130D2 www.ti.com SLOS708G – APRIL 2012 – REVISED DECEMBER 2017 Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2 Submit Documentation Feedback Copyright © 2012–2017, Texas Instruments Incorporated 7 Detailed Description 7.1 Overview The TPA31xxD2 device is a highly efficient Class D audio amplifier with integrated 120m Ohms MOSFET that allows output currents up to 7.5 A. The high efficiency allows the amplifier to provide an excellent audio performance without the need for a bulky heat sink. The device can be configured for either master or slave operation by using the SYNC pin. This helps to prevent audible beats noise. 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Gain Setting and Master and Slave The gain of the TPA31xxD2 family is set by the voltage divider connected to the GAIN/SLV control pin. Master or Slave mode is also controlled by the same pin. An internal ADC is used to detect the 8 input states. The first four stages sets the GAIN in Master mode in gains of 20, 26, 32, 36 dB respectively, while the next four stages sets the GAIN in Slave mode in gains of 20, 26, 32, 36 dB respectively. The gain setting is latched during power-up and cannot be changed while device is powered. Table 1 lists the recommended resistor values and the state and gain: |
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