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TPA3118D2 Datasheet(PDF) 28 Page - Texas Instruments

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Part # TPA3118D2
Description  15-W, 30-W, 50-W Filter-Free Class-D Stereo Amplifier Family With AM Avoidance
Download  45 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPA3118D2 Datasheet(HTML) 28 Page - Texas Instruments

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10
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1
10
40
Output Power (W)
f = 20Hz
f = 1kHz
f = 6kHz
Gain = 26dB
PVCC = 12V
TA = 25°C
RL = 4Ω
G009
0.001
0.01
0.1
1
10
0.01
0.1
1
10
100
Output Power (W)
f = 20Hz
f = 1kHz
f = 6kHz
Gain = 26dB
PVCC = 24V
TA = 25°C
RL = 4Ω
G010
28
TPA3116D2, TPA3118D2, TPA3130D2
SLOS708G – APRIL 2012 – REVISED DECEMBER 2017
www.ti.com
Product Folder Links: TPA3116D2 TPA3118D2 TPA3130D2
Submit Documentation Feedback
Copyright © 2012–2017, Texas Instruments Incorporated
8.2.3 Application Curves
Figure 38. Total Harmonic Distortion + Noise (BTL) vs
Output Power
Figure 39. Total Harmonic Distortion + Noise (BTL) vs
Output Power
9 Power Supply Recommendations
The power supply requirements for the TPA3116D2 consist of one higher-voltage supply to power the output
stage of the speaker amplifier. Several on-chip regulators are included on the TPA3116D2 to generate the
voltages necessary for the internal circuitry of the audio path. It is important to note that the voltage regulators
which have been integrated are sized only to provide the current necessary to power the internal circuitry. The
external pins are provided only as a connection point for off-chip bypass capacitors to filter the supply.
Connecting external circuitry to these regulator outputs may result in reduced performance and damage to the
device. The high voltage supply, between 4.5 V and 26 V, supplies the analog circuitry (AVCC) and the power
stage (PVCC). The AVCC supply feeds internal LDO including GVDD. This LDO output are connected to
external pins for filtering purposes, but should not be connected to external circuits. GVDD LDO output have
been sized to provide current necessary for internal functions but not for external loading.
10 Layout
10.1 Layout Guidelines
The TPA3116D2 can be used with a small, inexpensive ferrite bead output filter for most applications. However,
since the class-D switching edges are fast, it is necessary to take care when planning the layout of the printed
circuit board. The following suggestions will help to meet EMC requirements.
Decoupling capacitors — The high-frequency decoupling capacitors should be placed as close to the PVCC
and AVCC terminals as possible. Large (100 μF or greater) bulk power supply decoupling capacitors should
be placed near the TPA3116D2 on the PVCC supplies. Local, high-frequency bypass capacitors should be
placed as close to the PVCC pins as possible. These caps can be connected to the IC GND pad directly for
an excellent ground connection. Consider adding a small, good quality low ESR ceramic capacitor between
220 pF and 1 nF and a larger mid-frequency cap of value between 100 nF and 1 µF also of good quality to
the PVCC connections at each end of the chip.
Keep the current loop from each of the outputs through the ferrite bead and the small filter cap and back to
GND as small and tight as possible. The size of this current loop determines its effectiveness as an antenna.
Grounding — The PVCC decoupling capacitors should connect to GND. All ground should be connected at
the IC GND, which should be used as a central ground connection or star ground for the TPA3116D2.
Output filter — The ferrite EMI filter (see Figure 35) should be placed as close to the output terminals as
possible for the best EMI performance. The LC filter should be placed close to the outputs. The capacitors
used in both the ferrite and LC filters should be grounded.


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