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UPD703100 Datasheet(PDF) 70 Page - NEC

Part # UPD703100
Description  32-Bit Single-Chip Microcontrollers
Download  185 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD703100 Datasheet(HTML) 70 Page - NEC

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CHAPTER 5 INSTRUCTIONS
User’s Manual U12197EJ6V0UM
70
DIVHU
Divide Half-word Unsigned
Instruction format
DIVHU reg1, reg2, reg3
Operation
GR [reg2]
← GR [reg2] ÷ GR [reg1]
GR [reg3]
← GR [reg2] % GR [reg1]
Format
Format XI
Opcode
15
0
31
16
rrrrr111111RRRRR
wwwww01010000010
Flag
CY
OV
1 if overflow occurs; otherwise, 0.
S
1 if the result of an operation is negative; otherwise, 0.
Z
1 if the result of an operation is 0; otherwise, 0.
SAT
Instruction
DIVH Divide Half-word Unsigned
Explanation
Divides the word data of general-purpose register reg2 by the lower halfword data of general-
purpose register reg1, and stores the quotient in general-purpose register reg2, and the
remainder in general-purpose register reg3. If the data is divided by 0, an overflow occurs,
and the quotient is undefined. The data of general-purpose register reg1 is not affected.
Remark
An overflow occurs when data is divided by 0 (in which case the quotient is undefined).
If an interrupt occurs while this instruction is being executed, division is aborted, and the
interrupt is processed. Upon returning from the interrupt, the division is restarted from the
beginning, with the return address being the address of this instruction. Also, general-purpose
registers reg1 and reg2 will retain their original values prior to the start of execution.
If the address of reg2 is the same as the address of reg3, the remainder is stored in reg2
(=reg3).


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