V3020TP8B datasheet(13/17 Pages) EMMICRO

Part #	V3020TP8B

Description	Ultra Low Power 1-Bit 32 kHz RTC

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Manufacturer	EMMICRO [EM Microelectronic - MARIN SA]

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V3020

13

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Reading the Current Time and Date

Send copy_clock_to_RAM

addr. F hex

Read time and data status bits,

addr. 1

Is the seconds status bit set,

addr. 1, bit 0

Read seconds, addr. 2

Is the minutes status bit set,

addr. 1, bit 1

Read minutes, addr. 3

Similar for hours, day of month, week

day, month, year and week number

No

Yes

Current time and date

Fig. 11

Clock and Calendar

The Time and date addresses in the RAM (see Table 6)

provide access to the seconds, minutes, hours, day of

month, month, year, week day, and week number. These

parameters have the ranges indicated on Table 6 and are

in BCD format. If a parameter is found to be out of range,

it will be cleared on its being next incremented.

The

V3020 incorporates leap year correction and week

number calculation. The week number changes only at

the incrementation of the day number from 7 to 1. If week

52 day 7 falls on the 25

th, 26th or 27th of December, then

the week number will change to 0, otherwise it will be

week 1.

Week days are numbered from 1 to 7 with

Monday as 1.

Reading of the current time and date must be preceded

by a Copy_clock_to_RAM command. The time and date

status bits will indicate which time and date addresses

changed since the last time the command was used (see

Fig.

11).

The

time

and

date

from

the

last

Copy_clock_to_RAM command is held unchanged in the

RAM, except when power (VDD) has failed totally. To

change the current time and date in the clock, the desired

time an date must first be written to the RAM, the time set

lock bit cleared, and then a Copy_RAM_to_clock

command sent (see Fig. 12). The time set lock bit can be

used to prevent unauthorized setting of the clock.

Setting the Current Time and Date

Write seconds, minutes, hours, day

of month, week day, month, year and

week number to the RAM

Clear the time set lock bit,

addr. 0, bit 4

Send copy_RAM_to_clock command,

addr. E hex

Set the time set lock bit, addr. 0, bit 4

Fig. 12

Frequency Measurement

Setting bit 0 at address 0 will put a pulsed current source

(25 µA) onto the I/O pin, when the device is not chip

selected (ie. CS input high). The current source will be

pulsed on/off at 256 Hz. The period for ± 0 ppm time

keeping is 3.90625 ms. To measure the frequency signal

on pin I/O, the data bus must be high impedance. The

best way to ensure this is to hold the microprocessor and

peripherals in reset mode while measuring the frequency.

The clarity of the signal measured at pin I/O will depend

on both the probe input impedance (typically 1 M

Ω) and

the magnitude of the leakage current from other devices

driving the line connected to pin I/O.

If the signal

measured is unclear, put a 200 k

Ω resistor from pin I/O to

VSS. It should be noted that the magnitude of the current

source (25 µA) is not sufficient to drive the data bus line in

case of any other device driving the line, but it is sufficient

to take the line to a high logic level when the data bus is in

high impedance.

Use a crystal of nominal CL = 8.2 pF as specified in the

section "Operating Conditions".

The MX series from

Microcrystal is recommended. The accuracy of the time

keeping is dependent upon the frequency tolerance and

the load capacitance of the crystal.

11.57 ppm

corresponds to one second a day.

Test

From the various test features added to the V3020 some

may be activated by the user. Table 7a shows the test

mode b its. Table 8 shows the 3 available test modes and

how they can be activated. Test mode 0 is activated by

setting bit 2, address 0, and causes all time keeping to be

accelerated by 32. Test mode 1 is activated by setting bit

3, address 0, and causes all the time and date locations,

address 2 to address9, to be incremented in parallel at 1

Hz with no carry over (independent of each other). The

third test mode combines the previous two resulting in

parallel incrementing at 32 Hz.

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