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IS61LF25636A Datasheet(PDF) 5 Page - Integrated Silicon Solution, Inc |
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IS61LF25636A Datasheet(HTML) 5 Page - Integrated Silicon Solution, Inc |
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5 / 32 page  Integrated Silicon Solution, Inc. — 1-800-379-4774 5 Rev. A 05/04/05 ISSI® IS61LF25636A IS61LF51218A IS61VF25636A IS61VF51218A 119 BGA PACKAGE PIN CONFIGURATION 512KX18 (TOP VIEW) PIN DESCRIPTIONS Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired. 123456 7 A VDDQ AA ADSP AA VDDQ B NC CE2 A ADSC A A NC C NC A A VDD A A NC D DQb NC Vss NC Vss DQPa NC E NC DQb Vss CE Vss NC DQa F VDDQ NC Vss OE Vss DQa VDDQ G NC DQb BWb ADV Vss NC DQa H DQb NC Vss GW Vss DQa NC J VDDQ VDD NC VDD NC VDD VDDQ K NC DQb Vss CLK Vss NC DQa L DQb NC Vss NC BWa DQa NC M VDDQ DQb Vss BWE Vss NC VDDQ N DQb NC Vss A1* Vss DQa NC P NC DQPb Vss A0* Vss NC DQa R NC A MODE VDD NC A NC T NC A A NC A A ZZ U VDDQ TMS TDI TCK TDO NC VDDQ Symbol Pin Name A Address Inputs A0, A1 Synchronous Burst Address Inputs ADV Synchronous Burst Address Advance ADSP Address Status Processor ADSC Address Status Controller GW Global Write Enable CLK Synchronous Clock CE, CE2 Synchronous Chip Select BWx (x=a,b) Synchronous Byte Write Controls BWE Byte Write Enable Symbol Pin Name OE Output Enable ZZ Power Sleep Mode MODE Burst Sequence Selection TCK, TDO JTAG Pins TMS, TDI NC No Connect DQa-DQb Data Inputs/Outputs DQPa-Pb Output Power Supply VDD Power Supply VDDQ Output Power Supply Vss Ground |
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