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IS61LF12832A Datasheet(PDF) 6 Page - Integrated Silicon Solution, Inc |
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IS61LF12832A Datasheet(HTML) 6 Page - Integrated Silicon Solution, Inc |
6 / 25 page 6 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. 00A 08/11/05 ISSI® IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A, IS61(64)VF12836A, IS61(64)VF25618A PIN DESCRIPTIONS 165 PBGA PACKAGE PIN CONFIGURATION 128K X 36 (TOP VIEW) Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired. 12345 6 7 8 9 10 11 A NC A CE BWc BWb CE2 BWE ADSC ADV ANC B NC A CE2 BWd BWa CLK GW OE ADSP ANC C DQPc NC VDDQ Vss Vss Vss Vss Vss VDDQ NC DQPb D DQc DQc VDDQ VDD Vss Vss Vss VDD VDDQ DQb DQb E DQc DQc VDDQ VDD Vss Vss Vss VDD VDDQ DQb DQb F DQc DQc VDDQ VDD Vss Vss Vss VDD VDDQ DQb DQb G DQc DQc VDDQ VDD Vss Vss Vss VDD VDDQ DQb DQb H NC NC NC VDD Vss Vss Vss VDD NC NC ZZ J DQd DQd VDDQ VDD Vss Vss Vss VDD VDDQ DQa DQa K DQd DQd VDDQ VDD Vss Vss Vss VDD VDDQ DQa DQa L DQd DQd VDDQ VDD Vss Vss Vss VDD VDDQ DQa DQa M DQd DQd VDDQ VDD Vss Vss Vss VDD VDDQ DQa DQa N DQPd NC VDDQ Vss NC NC NC Vss VDDQ NC DQPa P NC NC A A NC A1* NC A AANC R MODE NC A A NC A0* NC A AAA Symbol Pin Name A Address Inputs A0, A1 Synchronous Burst Address Inputs ADV Synchronous Burst Address Advance ADSP Address Status Processor ADSC Address Status Controller GW Global Write Enable CLK Synchronous Clock CE, CE2, CE2 Synchronous Chip Select BWx (x=a,b,c,d) Synchronous Byte Write Controls Symbol Pin Name BWE Byte Write Enable OE Output Enable ZZ Power Sleep Mode MODE Burst Sequence Selection NC No Connect DQx Data Inputs/Outputs DQPx Data Inputs/Outputs VDD 3.3V/2.5V Power Supply VDDQ Isolated Output Power Supply 3.3V /2.5V Vss Ground |
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