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S-82T1A Datasheet(PDF) 10 Page - ABLIC Inc. |
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S-82T1A Datasheet(HTML) 10 Page - ABLIC Inc. |
10 / 41 page ![]() BATTERY PROTECTION IC WITH ALARM FUNCTION FOR 1-CELL PACK S-82T1A Series Rev.1.0_00 10 2. Ta = −20°C to +60°C*1 Table 11 (Ta = −20°C to +60°C*1 unless otherwise specified) Item Symbol Condition Min. Typ. Max. Unit Test Circuit Detection Voltage Overcharge detection voltage VCU − VCU − 0.017 VCU VCU + 0.017 V 1 Overcharge release voltage VCL VCL ≠ VCU VCL − 0.065 VCL VCL + 0.057 V 1 VCL = VCU VCL − 0.022 VCL VCL + 0.017 V 1 Alarm status detection voltage VAU − VAU − 0.017 VAU VAU + 0.017 V 1 Alarm hysteresis voltage VHA − VHA − 0.007 VHA VHA + 0.007 V 1 Overdischarge detection voltage VDL − VDL − 0.060 VDL VDL + 0.055 V 2 Overdischarge release voltage VDU VDL ≠ VDU VDU − 0.085 VDU VDU + 0.080 V 2 VDL = VDU VDU − 0.060 VDU VDU + 0.055 V 2 Discharge overcurrent 1 detection voltage VDIOV1 − VDIOV1 − 2 VDIOV1 VDIOV1 + 2 mV 5 Discharge overcurrent 2 detection voltage VDIOV2 − VDIOV2 − 3 VDIOV2 VDIOV2 + 3 mV 2 Load short-circuiting detection voltage VSHORT − VSHORT − 5 VSHORT VSHORT + 5 mV 2 Load short-circuiting 2 detection voltage VSHORT2 − VDD − 1.4 VDD − 0.8 VDD − 0.3 V 2 Charge overcurrent detection voltage VCIOV − VCIOV − 2 VCIOV VCIOV + 2 mV 2 Discharge overcurrent release voltage VRIOV VDD = 3.4 V VDD × 0.77 VDD × 0.80 VDD × 0.83 V 5 0 V Battery Charge 0 V battery charge starting charger voltage V0CHA 0 V battery charge enabled 0.5 1.1 1.7 V 4 0 V battery charge inhibition battery voltage V0INH 0 V battery charge inhibited 0.7 1.2 1.7 V 2 Internal Resistance Resistance between VDD pin and VM pin RVMD VDD = 1.8 V, VVM = 0 V 250 1250 3500 k Ω 3 Resistance between VM pin and VSS pin RVMS VDD = 3.4 V, VVM = 1.0 V 3.5 10 20 k Ω 3 Input Voltage Operation voltage between VDD pin and VSS pin VDSOP1 − 1.5 − 6.0 V − Operation voltage between VDD pin and VM pin VDSOP2 − 1.5 − 28 V − Input Current Current consumption during operation IOPE VDD = 3.4 V, VVM = 0 V − 2.5 6.0 μA 3 Current consumption during power-down IPDN VDD = VVM = 1.5 V − − 0.1 μA 3 Current consumption during overdischarge IOPED VDD = VVM = 1.5 V − − 1.0 μA 3 Output Resistance CO pin resistance "H" RCOH − 2.5 10 30 k Ω 4 CO pin resistance "L" RCOL − 0.75 3 9 k Ω 4 DO pin resistance "H" RDOH − 2.5 10 30 k Ω 4 DO pin resistance "L" RDOL − 0.5 2 6 k Ω 4 AO pin resistance "H" RAOH CMOS output 2.5 10 30 k Ω 4 AO pin resistance "L" RAOL − 0.5 2 6 k Ω 4 Delay Time Overcharge detection delay time tCU − tCU × 0.6 tCU tCU × 1.4 − 5 Alarm status detection delay time tAU − tAU × 0.6 tAU tAU × 1.4 − 5 Overdischarge detection delay time tDL − tDL × 0.6 tDL tDL × 1.4 − 5 Discharge overcurrent 1 detection delay time tDIOV1 − tDIOV1 × 0.65 tDIOV1 tDIOV1 × 1.35 − 5 Discharge overcurrent 2 detection delay time tDIOV2 − tDIOV2 × 0.6 tDIOV2 tDIOV2 × 1.4 − 5 Load short-circuiting detection delay time tSHORT − tSHORT × 0.6 tSHORT tSHORT × 1.4 − 5 Charge overcurrent detection delay time tCIOV − tCIOV × 0.6 tCIOV tCIOV × 1.4 − 5 *1. Since products are not screened at high and low temperature, the specification for this temperature range is guaranteed by design, not tested in production. |
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