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IC41SV44052-100T Datasheet(PDF) 6 Page - Integrated Circuit Solution Inc |
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IC41SV44052-100T Datasheet(HTML) 6 Page - Integrated Circuit Solution Inc |
6 / 17 page IC41SV44052 IC41SV44054 6 Integrated Circuit Solution Inc. DR035-0B 7/31/2002 ELECTRICAL CHARACTERISTICS(1) (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter Test Condition Speed Min. Max. Unit IIL Input Leakage Current Any input 0V ≤ VIN ≤ Vcc −55 µA Other inputs not under test = 0V IIO Output Leakage Current Output is disabled (Hi-Z) −55 µA 0V ≤ VOUT ≤ Vcc VOH Output High Voltage Level IOH = −2.0 mA 1.6 − V VOL Output Low Voltage Level IOL = 2 mA − 0.8 V ICC1 Standby Current: TTL RAS, CAS ≥ VIH − 1mA ICC2 Standby Current: CMOS RAS, CAS ≥ VCC − 0.2V 0.5 mA ICC3 Operating Current: RAS, CAS, -70 − 60 mA Random Read/Write(2,3,4) Address Cycling, tRC = tRC (min.) -100 − 50 Average Power Supply Current ICC4 Operating Current: RAS = VIL, CAS ≥ VIH -70 − 45 mA Fast Page Mode(2,3,4) tRC = tRC (min.) -100 − 35 Average Power Supply Current ICC5 Refresh Current: RAS Cycling, CAS ≥ VIH -70 − 60 mA RAS-Only(2,3) tRC = tRC (min.) -100 − 50 Average Power Supply Current ICC6 Refresh Current: RAS, CAS Cycling -70 − 60 mA CBR(2,3,5) tRC = tRC (min.) -100 − 50 Average Power Supply Current Notes: 1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded. 2. Dependent on cycle rates. 3. Specified values are obtained with minimum cycle time and the output open. 4. Column-address is changed once each Fast page cycle. 5. Enables on-chip refresh and address counters. |
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