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74F00 Datasheet(PDF) 2 Page - NXP Semiconductors |
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74F00 Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 8 page  Philips Semiconductors Product specification 74F00 Quad 2-input NAND gate 2 October 4, 1990 853-0325 00623 FEATURE • Industrial temperature range available (–40°C to +85°C) TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F00 3.4ns 4.4mA PIN CONFIGURATION 14 13 12 11 10 9 8 7 6 5 4 3 2 1 GND VCC D2b D2a Q2 Q3 D3b D3a D0a D0b Q1 Q0 D1a D1b SF00001 ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C INDUSTRIAL RANGE VCC = 5V ±10%, Tamb = –40°C to +85°C PKG DWG # 14-pin plastic DIP N74F00N I74F00N SOT27-1 14-pin plastic SO N74F00D I74F00D SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Dna, Dnb Data inputs 1.0/1.0 20 µA/0.6mA Qn Data output 50/33 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20 µA in the high state and 0.6mA in the low state. LOGIC DIAGRAM D0a D0b D1a D1b D2a Q0 D2b D3a D3b Q1 Q2 Q3 VCC = Pin 14 GND = Pin 7 3 6 8 11 1 2 4 5 9 10 12 13 SF00002 FUNCTION TABLE INPUTS OUTPUT Dna Dnb Qn L L H L H H H L H H H L NOTES: H = High voltage level L = Low voltage level LOGIC SYMBOL D0a D0b D1a D2a D2b D3a D3b D1b Q0 Q1 Q2 Q3 36 8 11 12 4 5 9 10 12 13 VCC = Pin 14 GND = Pin 7 SF00003 IEC/IEEE SYMBOL 1 2 4 5 9 10 12 13 & 3 6 8 11 SF00004 |
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Similar Description - 74F00 |
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