EM78P813

8-bit OTP Micro-controller

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* This specification is subject to change without notice.

56

2004/8/19

(V1.6)

VII.11 Differential Energy Detector (DED)

DED

DEDD

EGIN1

DEDTHD

DEDPWR

EGCLK

EGIN2

Fig.34

DED Block diagram

The Differential Energy Detector is differential input level and zero crossing detector named as DED. It can

detect any incoming AC signal above its threshold level and output corresponding zero-crossing frequency pulse. For

this energy detector, the user can set it’s minimum detection threshold level at –35dBm or –45dBm by DEDTHD bit.

All the minimum detection value can be achieved under input capacitor more than 4700pF and input resistor around

100k ohms. The energy detector has power control by IOCE PAGE1 bit 1 (DEDPWR).

Register bits of Energy Detector :

Register bits

Descriptions

RE PAGE0 bit 3 (DED)

DED : Interrupt flag of DED output data

RE PAGE1 bit 7 (DEDD) DEDD : Output data of DED

IOCE PAGE1

Bit 5 (EDGE)

EDGE : edge control of DED output data

1/0 => Falling edge trig. / Rising edge and Falling edge trig.

IOCE PAGE1

Bit 4 (WUEDD)

WUEDD : Wake-up control of DED output data

1/0 => enable/disable

IOCE PAGE1

Bit 6 (DED)

DED : Interrupt mask of DED output data

1/0

enable/disable interrupt of DED output data

IOCE PAGE1

Bit 0 (DEDTHD)

DEDTHD : Minimum detection threshold of DED

0/1

-45dBm/-35dBm

IOCE PAGE1

Bit 1 (DEDPWR)

DEDPWR : Power control of DED

0/1

power off/power on

IOCE PAGE1

Bit 2 (DEDCLK)

DEDCLK : operating clock of DED

0 : low frequency clock

1 : high frequency clock