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EM78P813BQ Datasheet(PDF) 48 Page - ELAN Microelectronics Corp |
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EM78P813BQ Datasheet(HTML) 48 Page - ELAN Microelectronics Corp |
48 / 65 page EM78P813 8-bit OTP Micro-controller __________________________________________________________________________________________________________________________________________________________________ * This specification is subject to change without notice. 48 2004/8/19 (V1.6) IOCC PORT C I/O Control , Port 6 Pull high register PAGE0 PORT C I/O Control 7 6 5 4 3 2 1 0 IOCC7 IOCC6 IOCC5 IOCC4 IOCC3 IOCC2 IOCC1 IOCC0 Bit 0~Bit 7 (IOCC0~IOCC7) : PORTC(0~7) I/O direction control register 0 put the relative I/O pin as output 1 put the relative I/O pin into high impedance PAGE1 Port 6 Pull High Register 7 6 5 4 3 2 1 0 PH67 PH66 PH65 PH64 PH63 PH62 PH61 PH60 Bit 0~Bit 7(PH60~PH67) : PORT6(0~7) pull high control register 0 disable pull high function. 1 enable pull high function IOCD PORT D I/O Control , Port 7 Pull high register PAGE0 PORT D I/O Control 7 6 5 4 3 2 1 0 IOCD7 IOCD6 IOCD5 IOCD4 IOCD3 IOCD2 IOCD1 IOCD0 Bit 0~Bit 6 (IOCD0~IOCD6) : PORTD(0~6) I/O direction control register 0 put the relative I/O pin as output 1 put the relative I/O pin into high impedance PAGE1 Port 7 Pull High Register 7 6 5 4 3 2 1 0 PH77 PH76 PH75 PH74 PH73 PH72 PH71 PH70 Bit 0~Bit 7(PH70~PH77) : PORT7(0~7) pull high control register 0 disable pull high function. 1 enable pull high function IOCE Interrupt mask , Differential Energy Detect PAGE0 Interrupt Mask Register1 7 6 5 4 3 2 1 0 INT7 INT6 INT5 INT4 INT3 INT2 INT1 INT0 Bit 0~Bit 7 : Interrupt enable bits. 0/1 disable interrupt/enable interrupt PAGE1 Differential Energy Detect 7 6 5 4 3 2 1 0 VRSEL DEDD EDGE WUEDD CW_SMB DEDCLK DEDPWR DEDTHD Bit 0(DEDTHD) : The minimum detection threshold of Differential Energy Detector (DED) 0/1 -45dBm/-30dBm Bit 1 (DEDPWR) : Power control of Differential Energy Detector (DED) 0/1 Power off / Power on Bit 2 (DEDCLK) : Operating clock for Differential Energy Detector (DED) 0/1 32.768kHz/3.5826MHz This bit is used to select operating clock for Differential Energy Detector (DED). When this bit is set to “1”, the PLL is also enabled regardless of RA bit 6 (ENPLL) . At this time, the Energy detector works at high frequency |
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