EM78P813

8-bit OTP Micro-controller

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* This specification is subject to change without notice.

44

2004/8/19

(V1.6)

PAGE1 Data RAM address2(H)

7

6

5

4

3

2

1

0

RAM2A13 RAM2A12 RAM2A11 RAM2A10 RAM2A9 RAM2A8

Bit 0~Bit 5 (RAM2A8 ~ RAM2A13) : Data RAM address (address8 to address13) for RAM reading or writing

Bit 6~Bit 7 : Unused

IOC8 PORT 8 I/O Control ,Port8 and Port9 IO/SEG&COM Control

PAGE0 PORT 8 I/O Control

7

6

5

4

3

2

1

0

IOC87

IOC86

IOC85

IOC84

IOC83

IOC82

IOC81

IOC80

Bit 0 ~ Bit 7 (IOC80 ~ IOC87) : PORT8(0~7) I/O direction control register

0

put the relative I/O pin as output

1

put the relative I/O pin into high impedance

PAGE1 IO/SEG&COM Control Register

7

6

5

4

3

2

1

0

-

-

LCDDV1 LCDDV0

P9SH

P9SL

P8SH

P8SL

Bit 0 (P8SL) : Switch low nibble I/O Port8 or LCD segment output for share pins SEGxx/P8x pins

0

select normal P80 ~ P83 for low nibble PORT8

1

select SEG66~SEG69 output for LCD SEGMENT output.

Bit 1 (P8SH) : Switch high nibble I/O Port8 or LCD segment output for share pins SEGxx/P8x pins

0

select normal P84 ~ P87 for high nibble PORT8

1

select SEG70 ~ SEG73 output for LCD SEGMENT output.

Bit 2 (P9SL) : Switch low nibble I/O Port9 or LCD segment output for share pins

0

select normal P90 ~ P93 for low nibble PORT9

1

select SEG74~SEG77 output for LCD SEGMENT output.

Bit 3 (P9SH) : Switch low nibble I/O Port9 or LCD segment output for share pins

0

select normal P94 ~ P97 for high nibble PORT9

1

select SEG78~SEG81 output for LCD SEGMENT output.

Bit 4~Bit 5(LCDDV0~LCDDV1) : LCD driver’s driving ability control

LCDDV1

LCDDV0

Driving mode

0

0

Normal mode (ratio = 1)

0

1

Weak mode (ratio = 1/2)

1

0

Strong mode (ratio = 2)

1

1

Maximum mode (ratio = 4)

LCDDV0 ~ LCDDV1 are used to select the driving ability of LCD driver. The driving ability is Maximum

mode > Strong mode > Normal mode > Weak mode by 1/2 ratio individually. The larger driving ability it is selected,

the larger output loading of LCD driver output can be afforded and the more current consumption is occurred. It

depends on user’s application.

Bit 6~ Bit7: Undefined register. These two bits are not allowed to use.

IOC9 PORT9 I/O Control , Port B IO/SEG Control

PAGE0 PORT 9 I/O Control

7

6

5

4

3

2

1

0

IOC97

IOC96

IOC95

IOC94

IOC93

IOC92

IOC91

IOC90

Bit 0 ~ Bit 7 (IOC90 ~ IOC97) : PORT9(0~7) I/O direction control register

0

put the relative I/O pin as output

1

put the relative I/O pin into high impedance