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EM78P813BQ Datasheet(PDF) 37 Page - ELAN Microelectronics Corp |
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EM78P813BQ Datasheet(HTML) 37 Page - ELAN Microelectronics Corp |
37 / 65 page EM78P813 8-bit OTP Micro-controller __________________________________________________________________________________________________________________________________________________________________ * This specification is subject to change without notice. 37 2004/8/19 (V1.6) Bias VC1 VC2 VC3 VC4 VC5 1/5 V1 4/5*V1 3/5*V1 2/5*V1 1/5*V1 1/6 V1 5/6*V1 4/6*V1 2/6*V1 1/6*V1 1/7 V1 6/7*V1 5/7*V1 2/7*V1 1/7*V1 Bit 2~Bit 3(LCD0~LCD1) : LCD operation function definition. LCD1 LCD0 LCD operation 0 0 Disable 0 1 Blanking 1 0 Reserved 1 1 LCD enable <Note 1> Key strobe and Key check functions should be normal operating whenever LCD is enabled or disabled. <Note 2> When LCD operation disable: (1) Internal Voltage regulator will disable and VREF pin is into high impedance. (2) Charge pump circuit disable. (3) Internal non-Inverter OP Amp power off. The controller can drive LCD directly. LCD block is made up of LCD driver, display RAM, segment output pins, common output pins and LCD operating bias pins. Duty is determined by RD PAGE2 bit5. The number of segment , the number of common and frame frequency are determined by LCD mode register RE PAGE2 Bit 0~ Bit 1. When 16 LCD commons and 1/4 duty are used, LCD operating bias pins VC1, VC2, VC4 and VC5 need to be connected 0.1uF capacitors to the ground (VC3 is not necessary). When 24 and 32 LCD common is used, all LCD operating bias pins VC1 ~ VC5 need to be connected 0.1uF capacitors to the ground. LCD driver can be controlled as different driving ability (refer to RD PAGE2 register). The basic structure contains a timing control which uses the basic frequency 32.768kHz to generate the proper timing for different duty and display access. RE PAGE2 register is a command register for LCD driver and display. The LCD display (disable, enable, blanking) is controlled by RE PAGE0 Bit 2 ~ Bit 3 and the driving duty is decided by RE PAGE2 Bit 0 ~ Bit 1. LCD display data is stored in data RAM which address and data access controlled by registers R9, RA PAGE1 and RB PAGE1. User can regulate the contrast of LCD display by RD PAGE2 (BIAS4..BIAS0). Up to 32 levels contrast is convenient for better display. And the internal voltage follower can afford large driving source. Bit 4 (KEYSCAN) : Key scan function enable control bit 0/1 disable/enable If you enable key scan function LCD waveform will has a small pulse within a period like fig.23 |
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