EM78P813

8-bit OTP Micro-controller

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* This specification is subject to change without notice.

34

2004/8/19

(V1.6)

Bit 5~ Bit 6 (IRS0~IRS1) : Internal regulator resister ratio modulate .

LCD driver bias voltage V1 = 2.7V x (1-Bias/100) x IRS rate ; If V1 larger than 5.4V,V1 will limit to 5.4V.

IRS1

IRS0

(1+Rb/Ra) ratio

0

0

1.5

0

1

1.75

1

0

2.0

1

1

2.25

BIAS

Circuit

Vref = 2.7V

Regulator

Circuit

VDD

Charge

pump Circuit

( Vref x 2 )

Bias4 ~ Bias 0

VEV = 1.805V ~ 2.65V

+

-

Vout = 5.4V

V1 = VEV*(1+Rb/Ra)

Ra

Rb

Vsat = 5.3V

Fig.23

The relation between VDD and V1

VC1 ~ VC5

VC1 ~ VC5

Bias

generator

LCD driver

for

COM and SEG

COM s

SEGs

V1

Fig.24

The relation between BIAS and VC1 ~ VC5