EM78P813

8-bit OTP Micro-controller

__________________________________________________________________________________________________________________________________________________________________

* This specification is subject to change without notice.

18

2004/8/19

(V1.6)

Bit 3 (CDAS) : Current DA switch

0

normal PORTD7

1

Current DA output

Bit 4 ~ Bit 7 : These 4 bits are undefined, they are not allowed to use.

R6 Port 6 I/O Data , Data ROM data buffer,CNT1 Data(H),DA control

PAGE0 Port 6 I/O Data

7

6

5

4

3

2

1

0

P67

P66

P65

P64

P63

P62

P61

P60

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

Bit 0 ~ Bit 7 (P60 ~ P67) : 8-bit PORT6 (0~7) I/O data register

User can use IOC register to define input or output each bit..

PAGE1 Data ROM Data buffer

7

6

5

4

3

2

1

0

DRD7

DRD6

DRD5

DRD4

DRD3

DRD2

DRD1

DRD0

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

R/W-X

Bit 0 ~ Bit 7 (DRD0 ~ DRD7) : Data ROM data buffer for ROM reading.

Example.

MOV

A,@1

MOV

R7_PAGE1,A

MOV

A,@0

MOV

R8_PAGE1,A

MOV

A,@0

MOV

R9_PAGE1,A

MOV

A,R6_PAGE1

;read the data at Data ROM which address is "00001".

PAGE2 Counter1 high 8bit Data buffer

7

6

5

4

3

2

1

0

CN1F

CN1E

CN1D

CN1C

CN1B

CN1A

CN19

CN18

Bit 0~Bit 7(CN18~CN1F) : Counter1's high 8 bits data buffer. Please refer to IOC9 page2 counter1 low 8 bit data buffer

for detail.

PAGE3 DA Control

7

6

5

4

3

2

1

0

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

Bit 0 ~ Bit 7 (DA2 ~ DA9) : Current DA most significant 8 bits of Current DA output buffer

Combine these 8 bits and R9 page3 bit4~bit5 2 bits as complete 10 bits Current DA output data. Control

register bit3 is Current DA power control .