Detailed Description

The MAX9401/MAX9404 are extremely fast, low-skew

quad ECL/PECL buffers/receivers designed for high-

speed data and clock driver applications. These

devices feature ultra-low propagation delay of 365ps

and channel-to-channel skew of 15ps in asynchronous

mode with 84mA supply current, making them ideal for

driving long cables and double termination applications

(Functional Diagram).

The four channels can be operated synchronously with

an external clock, or in asynchronous mode, deter-

mined by the state of the SEL input. An enable input

provides the ability to force all the outputs to a differen-

tial low state.

Data Input Termination

Figure 1 shows the input and output configuration of

the MAX9401/MAX9404. The MAX9401 has high-

impedance inputs and requires external termination.

The MAX9404 has integrated 100

Ω differential input

termination resistors across each of the four inputs (IN_

to IN_), reducing external component count.

Outputs

The MAX9401/MAX9404 have double-swing open-emit-

ter outputs as shown in Figure 1. The double-amplitude

swing outputs can drive double-terminated links or long

Quad ECL/PECL Differential

Buffers/Receivers

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5

PIN

NAME

FUNCTION

6EN

Noninverting Differential Output Enable Input. Setting EN = high and EN = low (differential high)

enables the outputs. Setting EN = low and EN = high (differential low) sets the outputs to logic low.

7

EN

Inverting Differential Output Enable Input

9

IN3

Noninverting Differential Input 3

10

IN3

Inverting Differential Input 3

12

OUT3

Inverting Differential Output 3

13

OUT3

Noninverting Differential Output 3

14, 20, 21, 27

Negative Supply Voltage

15

IN2

Noninverting Differential Input 2

16

IN2

Inverting Differential Input 2

18

OUT2

Inverting Differential Output 2

19

OUT2

Noninverting Differential Output 2

22

OUT1

Noninverting Differential Output 1

23

OUT1

Inverting Differential Output 1

25

IN1

Inverting Differential Input 1

26

IN1

Noninverting Differential Input 1

28

OUT0

Noninverting Differential Output 0

29

OUT0

Inverting Differential Output 0

31

IN0

Inverting Differential Input 0

32

IN0

Noninverting Differential Input 0

—

EP*

*QFN-EP package only.

Pin Description (continued)