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MAX9401EHJ Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX9401EHJ Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 13 page ![]() Ensure that the output currents do not exceed the cur- rent limits as specified in the Absolute Maximum Ratings. Under all operating conditions, the device’s total thermal limits should be observed. Power-Supply Bypassing Adequate power-supply bypassing is necessary to maximize the performance and noise immunity. Bypass VCC to VEE with high-frequency surface-mount ceramic 0.1µF and 0.01µF capacitors as close to the device as possible, with the 0.01µF capacitor closest to the device pins. Use multiple bypass vias for connection to minimize inductance. Circuit Board Traces Input and output trace characteristics affect the perfor- mance of the MAX9401/MAX9404. Connect each of the inputs and outputs to a 50 Ω characteristic impedance trace. Avoid discontinuities in differential impedance and maximize common-mode noise immunity by main- Quad ECL/PECL Differential Buffers/Receivers _______________________________________________________________________________________ 7 Figure 3. Input and Output Voltage Definitions VCC VID VID = 0 VIHD (MAX) VCC VEE VILD (MAX) VOH - VOL VOCM VOH VOL VEE VID VID = 0 VIHD (MIN) VILD (MIN) INPUT VOLTAGE DEFINITION OUTPUT VOLTAGE DEFINITION Figure 4. IN to OUT Propagation Delay Timing Diagram tPLH1 tPHL1 VOH - VOL VIHD - VILD VOH - VOL VOH - VOL tR tF 80% 20% 20% 80% DIFFERENTIAL OUTPUT WAVEFORM IN_ IN_ OUT_ OUT_ OUT_ - OUT_ (SEL = HIGH, EN = HIGH) |
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